From 93b4ed91f6b1027c370da9bdd6d86664dcda671b Mon Sep 17 00:00:00 2001 From: Kyösti Mälkki Date: Wed, 18 Apr 2012 21:13:33 +0300 Subject: Intel e7505: build as separate object file MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit No longer include northbridge files directly in the source for mainboard romstage.c and fix includes. Also make required adjustments to function declarations. Change-Id: Iafdcc0766ed44c64cc628e5935eef2c6372f5f22 Signed-off-by: Kyösti Mälkki Reviewed-on: http://review.coreboot.org/906 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/aopen/dxplplusu/romstage.c | 13 +++------- src/northbridge/intel/e7505/Makefile.inc | 2 ++ src/northbridge/intel/e7505/debug.c | 42 ++++++++++++++++++++------------ src/northbridge/intel/e7505/debug.h | 15 ++++++++++++ src/northbridge/intel/e7505/raminit.c | 15 ++++++++++-- src/northbridge/intel/e7505/raminit.h | 5 ++++ 6 files changed, 65 insertions(+), 27 deletions(-) create mode 100644 src/northbridge/intel/e7505/debug.h diff --git a/src/mainboard/aopen/dxplplusu/romstage.c b/src/mainboard/aopen/dxplplusu/romstage.c index ee900e9e12..1b3e785017 100644 --- a/src/mainboard/aopen/dxplplusu/romstage.c +++ b/src/mainboard/aopen/dxplplusu/romstage.c @@ -20,33 +20,28 @@ #include #include #include -#include #include -#include #include #include -#include #include #include -#include #include "southbridge/intel/i82801dx/i82801dx.h" #include "southbridge/intel/i82801dx/early_smbus.c" #include "southbridge/intel/i82801dx/reset.c" #include "northbridge/intel/e7505/raminit.h" -#include "northbridge/intel/e7505/debug.c" + +#include #include "superio/smsc/lpc47m10x/early_serial.c" #define SERIAL_DEV PNP_DEV(0x2e, LPC47M10X2_SP1) -static inline int spd_read_byte(unsigned device, unsigned address) +int spd_read_byte(unsigned device, unsigned address) { return smbus_read_byte(device, address); } -#include "northbridge/intel/e7505/raminit.c" - void main(unsigned long bist) { static const struct mem_controller memctrl[] = { @@ -66,7 +61,7 @@ void main(unsigned long bist) report_bist_failure(bist); // If this is a warm boot, some initialization can be skipped - if (!bios_reset_detected()) { + if (!e7505_mch_is_ready()) { enable_smbus(); /* The real MCH initialisation. */ diff --git a/src/northbridge/intel/e7505/Makefile.inc b/src/northbridge/intel/e7505/Makefile.inc index 23eada5ad3..8c50e404b2 100644 --- a/src/northbridge/intel/e7505/Makefile.inc +++ b/src/northbridge/intel/e7505/Makefile.inc @@ -1 +1,3 @@ ramstage-y += northbridge.c +romstage-y += raminit.c +romstage-y += debug.c diff --git a/src/northbridge/intel/e7505/debug.c b/src/northbridge/intel/e7505/debug.c index 07f15968e5..87569a5981 100644 --- a/src/northbridge/intel/e7505/debug.c +++ b/src/northbridge/intel/e7505/debug.c @@ -1,9 +1,20 @@ + +#include +#include +#include +#include +#include +#include + +#include "raminit.h" +#include "debug.h" + /* * generic debug code, used by mainboard specific romstage.c * */ -#if 1 -static void print_debug_pci_dev(unsigned dev) + +void print_debug_pci_dev(unsigned dev) { print_debug("PCI: "); print_debug_hex8((dev >> 16) & 0xff); @@ -13,7 +24,7 @@ static void print_debug_pci_dev(unsigned dev) print_debug_hex8((dev >> 8) & 7); } -static inline void print_pci_devices(void) +void print_pci_devices(void) { device_t dev; for(dev = PCI_DEV(0, 0, 0); @@ -31,7 +42,7 @@ static inline void print_pci_devices(void) } } -static void dump_pci_device(unsigned dev) +void dump_pci_device(unsigned dev) { int i; print_debug_pci_dev(dev); @@ -58,7 +69,7 @@ static void dump_pci_device(unsigned dev) print_debug("\n"); } -static inline void dump_pci_devices(void) +void dump_pci_devices(void) { device_t dev; for(dev = PCI_DEV(0, 0, 0); @@ -75,7 +86,7 @@ static inline void dump_pci_devices(void) } } -static inline void dump_pci_devices_on_bus(unsigned busn) +void dump_pci_devices_on_bus(unsigned busn) { device_t dev; for(dev = PCI_DEV(busn, 0, 0); @@ -92,7 +103,7 @@ static inline void dump_pci_devices_on_bus(unsigned busn) } } -static inline void dump_spd_registers(const struct mem_controller *ctrl) +void dump_spd_registers(const struct mem_controller *ctrl) { int i; print_debug("\n"); @@ -121,7 +132,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl) print_debug(": "); #endif } - status = smbus_read_byte(device, j); + status = spd_read_byte(device, j); if (status < 0) { break; } @@ -158,7 +169,7 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl) print_debug(": "); #endif } - status = smbus_read_byte(device, j); + status = spd_read_byte(device, j); if (status < 0) { break; } @@ -174,13 +185,13 @@ static inline void dump_spd_registers(const struct mem_controller *ctrl) } } } -static inline void dump_smbus_registers(void) +void dump_smbus_registers(void) { unsigned device; print_debug("\n"); for(device = 1; device < 0x80; device++) { int j; - if( smbus_read_byte(device, 0) < 0 ) continue; + if( spd_read_byte(device, 0) < 0 ) continue; #if !defined(__ROMCC__) printk(BIOS_DEBUG, "smbus: %02x", device); #else @@ -190,7 +201,7 @@ static inline void dump_smbus_registers(void) for(j = 0; j < 256; j++) { int status; unsigned char byte; - status = smbus_read_byte(device, j); + status = spd_read_byte(device, j); if (status < 0) { break; } @@ -215,7 +226,7 @@ static inline void dump_smbus_registers(void) } } -static inline void dump_io_resources(unsigned port) +void dump_io_resources(unsigned port) { int i; @@ -249,7 +260,7 @@ static inline void dump_io_resources(unsigned port) } } -static inline void dump_mem(unsigned start, unsigned end) +void dump_mem(unsigned start, unsigned end) { unsigned i; print_debug("dump_mem:"); @@ -271,5 +282,4 @@ static inline void dump_mem(unsigned start, unsigned end) #endif } print_debug("\n"); - } -#endif +} diff --git a/src/northbridge/intel/e7505/debug.h b/src/northbridge/intel/e7505/debug.h new file mode 100644 index 0000000000..a517fc0c2d --- /dev/null +++ b/src/northbridge/intel/e7505/debug.h @@ -0,0 +1,15 @@ +#ifndef E7505_DEBUG_H +#define E7505_DEBUG_H + +void print_debug_pci_dev(unsigned dev); +void print_pci_devices(void); +void dump_pci_device(unsigned dev); +void dump_pci_devices(void); +void dump_pci_devices_on_bus(unsigned busn); +void dump_spd_registers(const struct mem_controller *ctrl); +void dump_smbus_registers(void); +void dump_io_resources(unsigned port); +void dump_mem(unsigned start, unsigned end); + +#endif + diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c index 1d10a8cd73..fd4e2d051d 100644 --- a/src/northbridge/intel/e7505/raminit.c +++ b/src/northbridge/intel/e7505/raminit.c @@ -11,14 +11,25 @@ /* converted to C 6/2004 yhlu */ + +#include +#include +#include +#include +#include +#include +#include + #include #include #include #include #include #include -#include + +#include "raminit.h" #include "e7505.h" +#include "debug.h" /*----------------------------------------------------------------------------- Definitions: @@ -1899,7 +1910,7 @@ void e7505_mch_done(const struct mem_controller *memctrl) DUMPNORTH(); } -static int bios_reset_detected(void) +int e7505_mch_is_ready(void) { uint32_t dword = pci_read_config32(MCHDEV, DRC); return !!(dword & DRC_DONE); diff --git a/src/northbridge/intel/e7505/raminit.h b/src/northbridge/intel/e7505/raminit.h index a38d722d15..8eb4990364 100644 --- a/src/northbridge/intel/e7505/raminit.h +++ b/src/northbridge/intel/e7505/raminit.h @@ -18,5 +18,10 @@ struct mem_controller { void e7505_mch_init(const struct mem_controller *memctrl); void e7505_mch_scrub_ecc(unsigned long ret_addr); void e7505_mch_done(const struct mem_controller *memctrl); +int e7505_mch_is_ready(void); + + +/* Mainboard exports this. */ +int spd_read_byte(unsigned device, unsigned address); #endif /* RAMINIT_H */ -- cgit v1.2.3