From 91e8c2a1d40c5a41869b2a9595fb2cc2c5f579f5 Mon Sep 17 00:00:00 2001 From: David Wu Date: Mon, 18 Oct 2021 16:39:02 +0800 Subject: mb/google/brya/var/kano: Correct GPIO GPP_R6 and GPP_R7 setting Correct GPIO GPP_R6 and GPP_R7 setting to NF2 (DMIC_CLK1 and DMIC_DATA1). BUG=b:202913826 TEST=FW_NAME=kano emerge-brya coreboot and verify it builds without error. Signed-off-by: David Wu Change-Id: Ibf8ff0e48c4bab435d082dee27bcd53bc85b088d Reviewed-on: https://review.coreboot.org/c/coreboot/+/58414 Tested-by: build bot (Jenkins) Reviewed-by: CT Lin Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/variants/kano/fw_config.c | 4 ++-- src/mainboard/google/brya/variants/kano/gpio.c | 4 ++-- 2 files changed, 4 insertions(+), 4 deletions(-) diff --git a/src/mainboard/google/brya/variants/kano/fw_config.c b/src/mainboard/google/brya/variants/kano/fw_config.c index fdfee3ffff..55a6fad7c6 100644 --- a/src/mainboard/google/brya/variants/kano/fw_config.c +++ b/src/mainboard/google/brya/variants/kano/fw_config.c @@ -8,8 +8,8 @@ static const struct pad_config dmic_enable_pads[] = { PAD_CFG_NF(GPP_R4, NONE, DEEP, NF3), /* DMIC_CLK0_R */ PAD_CFG_NF(GPP_R5, NONE, DEEP, NF3), /* DMIC_DATA0_R */ - PAD_CFG_NF(GPP_R6, NONE, DEEP, NF3), /* DMIC_CLK1_R */ - PAD_CFG_NF(GPP_R7, NONE, DEEP, NF3), /* DMIC_DATA1_R */ + PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2), /* DMIC_CLK1_R */ + PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2), /* DMIC_DATA1_R */ }; static const struct pad_config dmic_disable_pads[] = { diff --git a/src/mainboard/google/brya/variants/kano/gpio.c b/src/mainboard/google/brya/variants/kano/gpio.c index 627354c4ab..6f40da1fc5 100644 --- a/src/mainboard/google/brya/variants/kano/gpio.c +++ b/src/mainboard/google/brya/variants/kano/gpio.c @@ -82,9 +82,9 @@ static const struct pad_config override_gpio_table[] = { /* R5 : HDA_SDI1 ==> DMIC_DATA0_R */ PAD_CFG_NF(GPP_R5, NONE, DEEP, NF3), /* R6 : I2S2_TXD ==> DMIC_CLK1_R */ - PAD_CFG_NF(GPP_R6, NONE, DEEP, NF3), + PAD_CFG_NF(GPP_R6, NONE, DEEP, NF2), /* R7 : I2S2_RXD ==> DMIC_DATA1_R */ - PAD_CFG_NF(GPP_R7, NONE, DEEP, NF3), + PAD_CFG_NF(GPP_R7, NONE, DEEP, NF2), /* S0 : SNDW0_CLK ==> I2S1_SPKR_SCLK_R */ PAD_CFG_NF(GPP_S0, NONE, DEEP, NF2), -- cgit v1.2.3