From 8f6dd2a4bd8146b9167ec4d2251af1d3045398f2 Mon Sep 17 00:00:00 2001 From: Shon Date: Tue, 24 May 2022 16:12:11 +0800 Subject: mb/google/brya/var/vell: Set empty on USB2_9/USB32_1 The baseboard uses port USB2 #9, and USB3 #1, but vell does not, therefore set the port configuration to EMPTY. Change-Id: I0d03b967fd2a051205ad5807f0bd8916bad7c036 Signed-off-by: Shon Reviewed-on: https://review.coreboot.org/c/coreboot/+/64628 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/variants/vell/overridetree.cb | 4 ++++ 1 file changed, 4 insertions(+) diff --git a/src/mainboard/google/brya/variants/vell/overridetree.cb b/src/mainboard/google/brya/variants/vell/overridetree.cb index c7f985cde3..23c3e61f14 100644 --- a/src/mainboard/google/brya/variants/vell/overridetree.cb +++ b/src/mainboard/google/brya/variants/vell/overridetree.cb @@ -60,6 +60,10 @@ chip soc/intel/alderlake }" register "usb2_ports[4]" = "USB2_PORT_TYPE_C(OC3)" # USB2_C3 register "usb2_ports[6]" = "USB2_PORT_MID(OC_SKIP)" + register "usb2_ports[8]" = "USB2_PORT_EMPTY" + + register "usb3_ports[0]" = "USB3_PORT_EMPTY" + register "tcss_ports[3]" = "TCSS_PORT_DEFAULT(OC3)" register "sagv" = "SaGv_Enabled" -- cgit v1.2.3