From 8df401db3bb6419c8fc9339dcc505332dff33bfe Mon Sep 17 00:00:00 2001 From: Stefan Reinauer Date: Fri, 18 Jan 2008 15:33:10 +0000 Subject: for some reasons the externals did not get committed. Signed-off-by: Stefan Reinauer Acked-by: Stefan Reinauer git-svn-id: svn://svn.coreboot.org/coreboot/trunk@3054 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- util/flashrom/README | 10 +++++----- util/flashrom/board_enable.c | 10 +++++----- util/flashrom/flash.h | 4 ++-- util/flashrom/flashchips.c | 4 ++-- util/flashrom/flashrom.8 | 10 +++++----- util/flashrom/flashrom.c | 2 +- util/flashrom/layout.c | 4 ++-- util/flashrom/lbtable.c | 10 +++++----- util/flashrom/linuxbios_tables.h | 14 +++++++------- util/flashrom/m29f400bt.c | 2 +- 10 files changed, 35 insertions(+), 35 deletions(-) diff --git a/util/flashrom/README b/util/flashrom/README index 9f842ff508..994a163808 100644 --- a/util/flashrom/README +++ b/util/flashrom/README @@ -2,7 +2,7 @@ Flashrom README ------------------------------------------------------------------------------- -This is the universal (LinuxBIOS) flash utility. +This is the universal (coreboot) flash utility. Build Requirements ------------------ @@ -38,17 +38,17 @@ Usage is that flash info is dumped and the flash chip is set to writable. -LinuxBIOS Table and Mainboard Identification +coreboot Table and Mainboard Identification -------------------------------------------- -Flashrom reads the LinuxBIOS table to determine the current mainboard -(parse DMI as well in future?). If no LinuxBIOS table could be read +Flashrom reads the coreboot table to determine the current mainboard +(parse DMI as well in future?). If no coreboot table could be read or if you want to override these values, you can specify -m, e.g.: flashrom -w --mainboard AGAMI:ARUMA agami_aruma.rom The following boards require the specification of the board name, if -no LinuxBIOS table is found: +no coreboot table is found: * IWILL DK8-HTX: use -m iwill:dk8_htx * Agami Aruma: use -m AGAMI:ARUMA diff --git a/util/flashrom/board_enable.c b/util/flashrom/board_enable.c index 79c6e87655..27f431f513 100644 --- a/util/flashrom/board_enable.c +++ b/util/flashrom/board_enable.c @@ -148,7 +148,7 @@ static int w83627thf_gpio4_4_raise_4e(const char *name) /** * Suited for VIAs EPIA M and MII, and maybe other CLE266 based EPIAs. * - * We don't need to do this when using LinuxBIOS, GPIO15 is never lowered there. + * We don't need to do this when using coreboot, GPIO15 is never lowered there. */ static int board_via_epia_m(const char *name) { @@ -368,7 +368,7 @@ struct board_pciid_enable { uint16_t second_card_vendor; uint16_t second_card_device; - /* The vendor / part name from the LinuxBIOS table. */ + /* The vendor / part name from the coreboot table. */ const char *lb_vendor; const char *lb_part; @@ -407,10 +407,10 @@ struct board_pciid_enable board_pciid_enables[] = { }; /** - * Match boards on LinuxBIOS table gathered vendor and part name. + * Match boards on coreboot table gathered vendor and part name. * Require main PCI IDs to match too as extra safety. */ -static struct board_pciid_enable *board_match_linuxbios_name(const char *vendor, const char *part) +static struct board_pciid_enable *board_match_coreboot_name(const char *vendor, const char *part) { struct board_pciid_enable *board = board_pciid_enables; @@ -478,7 +478,7 @@ int board_flash_enable(const char *vendor, const char *part) int ret = 0; if (vendor && part) - board = board_match_linuxbios_name(vendor, part); + board = board_match_coreboot_name(vendor, part); if (!board) board = board_match_pci_card_ids(); diff --git a/util/flashrom/flash.h b/util/flashrom/flash.h index 4b571625ff..dffb1b8036 100644 --- a/util/flashrom/flash.h +++ b/util/flashrom/flash.h @@ -286,7 +286,7 @@ int find_romentry(char *name); int handle_romentries(uint8_t *buffer, uint8_t *content); /* lbtable.c */ -int linuxbios_init(void); +int coreboot_init(void); extern char *lb_part, *lb_vendor; /* spi.c */ @@ -329,7 +329,7 @@ int erase_m29f400bt(struct flashchip *flash); int block_erase_m29f400bt(volatile uint8_t *bios, volatile uint8_t *dst); int write_m29f400bt(struct flashchip *flash, uint8_t *buf); -int write_linuxbios_m29f400bt(struct flashchip *flash, uint8_t *buf); +int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf); void toggle_ready_m29f400bt(volatile uint8_t *dst); void data_polling_m29f400bt(volatile uint8_t *dst, uint8_t data); void protect_m29f400bt(volatile uint8_t *bios); diff --git a/util/flashrom/flashchips.c b/util/flashrom/flashchips.c index bdafbe6874..18589c06cb 100644 --- a/util/flashrom/flashchips.c +++ b/util/flashrom/flashchips.c @@ -47,7 +47,7 @@ struct flashchip flashchips[] = { {"EN29F002(A)(N)B", EON_ID, EN_29F002B, 256, 256, probe_jedec, erase_chip_jedec, write_jedec}, {"MBM29F400TC", FUJITSU_ID, MBM29F400TC_STRANGE, 512, 64 * 1024, - probe_m29f400bt, erase_m29f400bt, write_linuxbios_m29f400bt}, + probe_m29f400bt, erase_m29f400bt, write_coreboot_m29f400bt}, {"MX29F002", MX_ID, MX_29F002, 256, 64 * 1024, probe_29f002, erase_29f002, write_29f002}, {"MX25L4005", MX_ID, MX_25L4005, 512, 256, @@ -131,7 +131,7 @@ struct flashchip flashchips[] = { {"M29F002T/NT", ST_ID, ST_M29F002T, 256, 64 * 1024, probe_jedec, erase_chip_jedec, write_jedec}, {"M29F400BT", ST_ID, ST_M29F400BT, 512, 64 * 1024, - probe_m29f400bt, erase_m29f400bt, write_linuxbios_m29f400bt}, + probe_m29f400bt, erase_m29f400bt, write_coreboot_m29f400bt}, {"M50FLW040A", ST_ID, ST_M50FLW040A, 512, 64 * 1024, probe_jedec, erase_chip_jedec, write_jedec}, {"M50FLW040B", ST_ID, ST_M50FLW040B, 512, 64 * 1024, diff --git a/util/flashrom/flashrom.8 b/util/flashrom/flashrom.8 index 1803bf826d..3197460301 100644 --- a/util/flashrom/flashrom.8 +++ b/util/flashrom/flashrom.8 @@ -7,7 +7,7 @@ flashrom \- a universal flash programming utility .SH DESCRIPTION .B flashrom is a universal flash programming utility for DIP, PLCC, or SPI flash ROM -chips. It can be used to flash BIOS/LinuxBIOS/firmware images, for example. +chips. It can be used to flash BIOS/coreboot/firmware images, for example. .SH OPTIONS If no file is specified, then all that happens is that flash info is dumped and the flash chip is set to writable. @@ -46,8 +46,8 @@ README for a list. Force write without checking whether the ROM image file is really meant to be used on this board. .sp -Note: This check only works while LinuxBIOS is running, and only for those -boards where the LinuxBIOS code supports it. +Note: This check only works while coreboot is running, and only for those +boards where the coreboot code supports it. .TP .B "\-l, \-\-layout" Read ROM layout from file. @@ -63,8 +63,8 @@ Show a help text and exit. .\".B "\-\-version" .\"Show version information and exit. .SH BUGS -Please report any bugs at http://tracker.linuxbios.org/trac/LinuxBIOS/, -or on the LinuxBIOS mailing list (http://linuxbios.org/Mailinglist). +Please report any bugs at http://tracker.coreboot.org/trac/coreboot/, +or on the coreboot mailing list (http://www.coreboot.org/Mailinglist). .SH LICENCE .B flashrom is covered by the GNU General Public License (GPL), version 2 or later. diff --git a/util/flashrom/flashrom.c b/util/flashrom/flashrom.c index 27cf1fc0cf..9fde57d9ef 100644 --- a/util/flashrom/flashrom.c +++ b/util/flashrom/flashrom.c @@ -350,7 +350,7 @@ int main(int argc, char *argv[]) /* We look at the lbtable first to see if we need a * mainboard specific flash enable sequence. */ - linuxbios_init(); + coreboot_init(); /* try to enable it. Failure IS an option, since not all motherboards * really need this to be done, etc., etc. diff --git a/util/flashrom/layout.c b/util/flashrom/layout.c index cbd8791cc5..3d24b25af6 100644 --- a/util/flashrom/layout.c +++ b/util/flashrom/layout.c @@ -46,7 +46,7 @@ int show_id(uint8_t *bios, int size) return 0; } - printf_debug("LinuxBIOS last image size " + printf_debug("coreboot last image size " "(not ROM size) is %d bytes.\n", *walk); walk--; @@ -57,7 +57,7 @@ int show_id(uint8_t *bios, int size) printf_debug("Mainboard ID: %s\n", mainboard_part); /* - * If lb_vendor is not set, the linuxbios table was + * If lb_vendor is not set, the coreboot table was * not found. Nor was -mVENDOR:PART specified */ diff --git a/util/flashrom/lbtable.c b/util/flashrom/lbtable.c index a56afc7640..1cca964c22 100644 --- a/util/flashrom/lbtable.c +++ b/util/flashrom/lbtable.c @@ -124,7 +124,7 @@ static struct lb_header *find_lb_table(void *base, unsigned long start, head->table_checksum); continue; } - fprintf(stdout, "Found LinuxBIOS table at 0x%08lx.\n", addr); + fprintf(stdout, "Found coreboot table at 0x%08lx.\n", addr); return head; }; @@ -181,7 +181,7 @@ static void search_lb_records(struct lb_record *rec, struct lb_record *last, } } -int linuxbios_init(void) +int coreboot_init(void) { uint8_t *low_1MB; struct lb_header *lb_table; @@ -201,16 +201,16 @@ int linuxbios_init(void) if (lb_table) { unsigned long addr; addr = ((char *)lb_table) - ((char *)low_1MB); - printf_debug("LinuxBIOS table found at %p.\n", lb_table); + printf_debug("Coreboot table found at %p.\n", lb_table); rec = (struct lb_record *)(((char *)lb_table) + lb_table->header_bytes); last = (struct lb_record *)(((char *)rec) + lb_table->table_bytes); - printf_debug("LinuxBIOS header(%d) checksum: %04x table(%d) checksum: %04x entries: %d\n", + printf_debug("Coreboot header(%d) checksum: %04x table(%d) checksum: %04x entries: %d\n", lb_table->header_bytes, lb_table->header_checksum, lb_table->table_bytes, lb_table->table_checksum, lb_table->table_entries); search_lb_records(rec, last, addr + lb_table->header_bytes); } else { - printf("No LinuxBIOS table found.\n"); + printf("No coreboot table found.\n"); return -1; } diff --git a/util/flashrom/linuxbios_tables.h b/util/flashrom/linuxbios_tables.h index 08fbff2454..c4c2d4d17e 100644 --- a/util/flashrom/linuxbios_tables.h +++ b/util/flashrom/linuxbios_tables.h @@ -1,9 +1,9 @@ -#ifndef LINUXBIOS_TABLES_H -#define LINUXBIOS_TABLES_H +#ifndef COREBOOT_TABLES_H +#define COREBOOT_TABLES_H #include -/* The linuxbios table information is for conveying information +/* The coreboot table information is for conveying information * from the firmware to the loaded OS image. Primarily this * is expected to be information that cannot be discovered by * other means, such as quering the hardware directly. @@ -31,12 +31,12 @@ * table entries and be backwards compatible, but it is not required. */ -/* Since LinuxBIOS is usually compiled 32bit, gcc will align 64bit - * types to 32bit boundaries. If the LinuxBIOS table is dumped on a +/* Since coreboot is usually compiled 32bit, gcc will align 64bit + * types to 32bit boundaries. If the coreboot table is dumped on a * 64bit system, a uint64_t would be aligned to 64bit boundaries, * breaking the table format. * - * lb_uint64 will keep 64bit LinuxBIOS table values aligned to 32bit + * lb_uint64 will keep 64bit coreboot table values aligned to 32bit * to ensure compatibility. They can be accessed with the two functions * below: unpack_lb64() and pack_lb64() * @@ -207,4 +207,4 @@ struct cmos_checksum { #define CHECKSUM_PCBIOS 1 }; -#endif /* LINUXBIOS_TABLES_H */ +#endif /* COREBOOT_TABLES_H */ diff --git a/util/flashrom/m29f400bt.c b/util/flashrom/m29f400bt.c index 7d8539f5cd..bc70449993 100644 --- a/util/flashrom/m29f400bt.c +++ b/util/flashrom/m29f400bt.c @@ -174,7 +174,7 @@ int write_m29f400bt(struct flashchip *flash, uint8_t *buf) return 0; } -int write_linuxbios_m29f400bt(struct flashchip *flash, uint8_t *buf) +int write_coreboot_m29f400bt(struct flashchip *flash, uint8_t *buf) { volatile uint8_t *bios = flash->virtual_memory; -- cgit v1.2.3