From 8de2d591e2ba4d2dba2260cbf72391c582a4510d Mon Sep 17 00:00:00 2001 From: Tim Crawford Date: Fri, 6 Aug 2021 16:17:28 -0600 Subject: 3rdparty/intel-microcode: Update submodule to 20210608 release Update submodule pointer to include microcode for TGL and others. Tested the following still boot: - galp3-c (WHL-U): sig=0x806eb pf=0x80 revision=0xe9 - oryp5 (CFL-H): sig=0x906ea pf=0x20 revision=0xe9 - gaze15 (CML-H): sig=0xa0652 pf=0x20 revision=0xe9 coreboot reports the revision as -1 from what it actually is. i.e., these should report revision=0xea (and that is what Linux reports). However, this behavior is not new. Change-Id: I084ba67e8eaf7383f1c05fa5589b63c92ff900b1 Signed-off-by: Tim Crawford Reviewed-on: https://review.coreboot.org/c/coreboot/+/56861 Reviewed-by: Felix Singer Reviewed-by: Arthur Heymans Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- 3rdparty/intel-microcode | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/3rdparty/intel-microcode b/3rdparty/intel-microcode index 49bb67f32a..3f97690f0d 160000 --- a/3rdparty/intel-microcode +++ b/3rdparty/intel-microcode @@ -1 +1 @@ -Subproject commit 49bb67f32a2e3e631ba1a9a73da1c52e1cac7fd9 +Subproject commit 3f97690f0da8011f52209b232450a1e5c4f2e1f6 -- cgit v1.2.3