From 8d0fd5d7d3a97d52e9e9fabb6dbe92a429f613f0 Mon Sep 17 00:00:00 2001 From: Ricky Liang Date: Wed, 11 Jul 2018 17:07:31 +0800 Subject: mainboard/google/nocturne: Update GPIO_FCAM_PWR_EN The FCAM_PWR_EN gpio should be GPP_B4 according to the latest board schematics. Change-Id: Id926bd224b3392d8a61b6d8ae0509053afaa5b9e Signed-off-by: Ricky Liang Reviewed-on: https://review.coreboot.org/27433 Tested-by: build bot (Jenkins) Reviewed-by: Furquan Shaikh Reviewed-by: Tomasz Figa Reviewed-by: Nick Vaccaro --- src/mainboard/google/poppy/variants/nocturne/gpio.c | 4 ++-- src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h | 2 +- 2 files changed, 3 insertions(+), 3 deletions(-) diff --git a/src/mainboard/google/poppy/variants/nocturne/gpio.c b/src/mainboard/google/poppy/variants/nocturne/gpio.c index 481348768b..3c186c7d8a 100644 --- a/src/mainboard/google/poppy/variants/nocturne/gpio.c +++ b/src/mainboard/google/poppy/variants/nocturne/gpio.c @@ -177,8 +177,8 @@ static const struct pad_config gpio_table[] = { PAD_CFG_NC(GPP_D6), /* D7 : ISH_I2C1_SDA ==> RCAM_PWR_EN */ PAD_CFG_GPO(GPP_D7, 0, DEEP), - /* D8 : ISH_I2C1_SCL ==> FCAM_PWR_EN */ - PAD_CFG_GPO(GPP_D8, 0, DEEP), + /* D8 : ISH_I2C1_SCL ==> NC */ + PAD_CFG_NC(GPP_D8), /* D9 : ISH_SPI_CS# ==> PCH_SR1_INT_L */ PAD_CFG_GPI_APIC(GPP_D9, NONE, DEEP), /* D10 : ISH_SPI_CLK ==> PCH_SR0_INT_L */ diff --git a/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h b/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h index 028db14f47..0853893d40 100644 --- a/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h +++ b/src/mainboard/google/poppy/variants/nocturne/include/variant/gpio.h @@ -41,7 +41,7 @@ #define GPIO_RCAM_PWR_EN GPP_D7 #define GPIO_PCH_RCAM_CLK_EN GPP_D14 #define GPIO_RCAM_RST_L GPP_D16 -#define GPIO_FCAM_PWR_EN GPP_D8 +#define GPIO_FCAM_PWR_EN GPP_B4 #define GPIO_PCH_FCAM_CLK_EN GPP_D13 #define GPIO_FCAM_RST_L GPP_D15 -- cgit v1.2.3