From 872c34a57f5a198c2fb2e1c5c82b0ebbccf27b97 Mon Sep 17 00:00:00 2001 From: Kevin Chang Date: Thu, 3 Mar 2022 21:08:26 +0800 Subject: Revert "mb/google/brya/var/taeko: Fix PLD group order (W/A)" This revert commit acb17fec34a609c5b674ad0d2af04d47800530e2. This issue was fixed in the OS, therefore the workaround can be reverted. BUG=b:210497855 BRANCH=firmware-brya-14505.B TEST=build coreboot and boot into OS. Signed-off-by: Kevin Chang Change-Id: Ic836e0cf53c2f9d30bd12851be285d864b2256b8 Reviewed-on: https://review.coreboot.org/c/coreboot/+/62565 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/mainboard/google/brya/variants/taeko/overridetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/brya/variants/taeko/overridetree.cb b/src/mainboard/google/brya/variants/taeko/overridetree.cb index 760ffa6e3f..ac83e583af 100644 --- a/src/mainboard/google/brya/variants/taeko/overridetree.cb +++ b/src/mainboard/google/brya/variants/taeko/overridetree.cb @@ -466,7 +466,7 @@ chip soc/intel/alderlake register "desc" = ""USB3 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))" device ref tcss_usb3_port3 on probe DB_USB DB_USB3_NO_A probe DB_USB DB_USB3_1C_1A @@ -489,7 +489,7 @@ chip soc/intel/alderlake register "desc" = ""USB2 Type-C Port C1 (DB)"" register "type" = "UPC_TYPE_C_USB2_SS_SWITCH" register "use_custom_pld" = "true" - register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(2, 1))" + register "custom_pld" = "ACPI_PLD_TYPE_C(RIGHT, LEFT, ACPI_PLD_GROUP(3, 1))" device ref usb2_port3 on probe DB_USB DB_USB3_NO_A probe DB_USB DB_USB3_1C_1A -- cgit v1.2.3