From 86ea251ba05bbfd58c69549c8b479ac309bda8ed Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Tue, 18 Aug 2020 21:12:37 +0200 Subject: soc/intel/xeon_sp/cpx/Kconfig: Relocate 'select CACHE_MRC_SETTINGS' This will remove the warning: "src/soc/intel/xeon_sp/cpx/Kconfig:79:warning: config symbol 'CPU_BCLK_MHZ' uses select, but is not boolean or tristate" Change-Id: I2cfaf347b638e3847caa167e7efda89e9202960a Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/c/coreboot/+/44548 Tested-by: build bot (Jenkins) Reviewed-by: Benjamin Doron Reviewed-by: Nico Huber Reviewed-by: Patrick Rudolph Reviewed-by: Angel Pons Reviewed-by: Jonathan Zhang --- src/soc/intel/xeon_sp/Kconfig | 1 + src/soc/intel/xeon_sp/cpx/Kconfig | 2 -- 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/src/soc/intel/xeon_sp/Kconfig b/src/soc/intel/xeon_sp/Kconfig index cf9ba944e6..545b4232f2 100644 --- a/src/soc/intel/xeon_sp/Kconfig +++ b/src/soc/intel/xeon_sp/Kconfig @@ -17,6 +17,7 @@ config SOC_INTEL_COOPERLAKE_SP bool select XEON_SP_COMMON_BASE select PLATFORM_USES_FSP2_2 + select CACHE_MRC_SETTINGS help Intel Cooperlake-SP support diff --git a/src/soc/intel/xeon_sp/cpx/Kconfig b/src/soc/intel/xeon_sp/cpx/Kconfig index dcbadf8aab..8e7e6f1094 100644 --- a/src/soc/intel/xeon_sp/cpx/Kconfig +++ b/src/soc/intel/xeon_sp/cpx/Kconfig @@ -76,8 +76,6 @@ config CPU_BCLK_MHZ int default 100 -select CACHE_MRC_SETTINGS - # CPX-SP has 2 IMCs, 3 channels per IMC, 2 DIMMs per channel # Default value is set to one socket, full config. config DIMM_MAX -- cgit v1.2.3