From 84ec70312e977355c8bac4be575c5808797da04d Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Thu, 11 Feb 2021 13:18:45 +0100 Subject: mb/intel/dcp847ske: Drop useless MCHBAR writes There's no need to write the GDCRTRAININGRESULT registers after raminit. Change-Id: If604920fe7a3bee96f72f8aff5e96f0e25548f18 Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/50534 Reviewed-by: Patrick Rudolph Reviewed-by: Arthur Heymans Reviewed-by: Tobias Diedrich Tested-by: build bot (Jenkins) --- src/mainboard/intel/dcp847ske/early_southbridge.c | 8 -------- 1 file changed, 8 deletions(-) diff --git a/src/mainboard/intel/dcp847ske/early_southbridge.c b/src/mainboard/intel/dcp847ske/early_southbridge.c index d09da01401..92d49c1a2b 100644 --- a/src/mainboard/intel/dcp847ske/early_southbridge.c +++ b/src/mainboard/intel/dcp847ske/early_southbridge.c @@ -9,14 +9,6 @@ #include "superio.h" #include "thermal.h" -void mainboard_late_rcba_config(void) -{ - /* Set "mobile" bit in MCH (which makes sense layout-wise). */ - /* Note sure if this has any effect at all though. */ - MCHBAR32(0x0004) |= 0x00001000; - MCHBAR32(0x0104) |= 0x00001000; -} - static const u16 hwm_initvals[] = { HWM_BANK(0), HWM_INITVAL(0xae, 0x01), /* Enable PECI Agent0 */ -- cgit v1.2.3