From 84c0d95f3f9eb9e9dde319abc2e04b3e344de0ca Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Tue, 16 Jul 2024 13:04:44 +0000 Subject: soc/intel/alderlake: Use common CAR API for cache reporting Replace the SoC-specific `report_cache_info()` function with the common `car_report_cache_info()` API from `car_lib`. This promotes code reuse and reduces SoC-specific implementation for cache reporting. BUG=none TEST=Builds and boots successfully on google/marasov platform. Change-Id: I18be2c33dbe5186643af52823eb2fb185a296909 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/83481 Reviewed-by: Eric Lai Tested-by: build bot (Jenkins) --- src/soc/intel/alderlake/bootblock/report_platform.c | 18 ++---------------- 1 file changed, 2 insertions(+), 16 deletions(-) diff --git a/src/soc/intel/alderlake/bootblock/report_platform.c b/src/soc/intel/alderlake/bootblock/report_platform.c index cd4ac00c14..6372cd6751 100644 --- a/src/soc/intel/alderlake/bootblock/report_platform.c +++ b/src/soc/intel/alderlake/bootblock/report_platform.c @@ -16,6 +16,7 @@ #include #include #include +#include #include #include @@ -251,21 +252,6 @@ static inline uint16_t get_dev_id(pci_devfn_t dev) return pci_read_config16(dev, PCI_DEVICE_ID); } -static void report_cache_info(void) -{ - int cache_level = CACHE_L3; - struct cpu_cache_info info; - - if (!fill_cpu_cache_info(cache_level, &info)) - return; - - printk(BIOS_INFO, "Cache: Level %d: ", cache_level); - printk(BIOS_INFO, "Associativity = %zd Partitions = %zd Line Size = %zd Sets = %zd\n", - info.num_ways, info.physical_partitions, info.line_size, info.num_sets); - - printk(BIOS_INFO, "Cache size = %zu MiB\n", get_cache_size(&info)/MiB); -} - static void report_cpu_info(void) { u32 i, cpu_id, cpu_feature_flag; @@ -297,7 +283,7 @@ static void report_cpu_info(void) "CPU: AES %ssupported, TXT %ssupported, VT %ssupported\n", mode[aes], mode[txt], mode[vt]); - report_cache_info(); + car_report_cache_info(); } static void report_mch_info(void) -- cgit v1.2.3