From 817994c1bec48733679c34fe717a07ad81af18ac Mon Sep 17 00:00:00 2001 From: Patrick Rudolph Date: Mon, 17 Dec 2018 12:25:50 +0100 Subject: mb/ocp/wedge100s/romstage: Workaround broken platform state Sometimes the platform boots in an invalid state, that will cause FSP-M to fail. As a board_reset() doesn't fix it, issue an full_reset() as soon as the IA32_FEATURE_CONTROL MSR is locked at beging of romstage. Tested on wedge100s. After full reset the system behaves as normal. Change-Id: I1a382b8fb650311b0c24b48e0986d22edfa2d261 Signed-off-by: Patrick Rudolph Reviewed-on: https://review.coreboot.org/c/30290 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber Reviewed-by: Philipp Deppenwiese --- src/mainboard/ocp/wedge100s/romstage.c | 20 +++++++++++++++++++- 1 file changed, 19 insertions(+), 1 deletion(-) diff --git a/src/mainboard/ocp/wedge100s/romstage.c b/src/mainboard/ocp/wedge100s/romstage.c index cf52c01f04..1d770366ba 100644 --- a/src/mainboard/ocp/wedge100s/romstage.c +++ b/src/mainboard/ocp/wedge100s/romstage.c @@ -17,6 +17,9 @@ #include #include #include +#include +#include +#include /** * /brief mainboard call for setup that needs to be done before fsp init @@ -24,7 +27,22 @@ */ void early_mainboard_romstage_entry(void) { - + /* + * Sometimes the system boots in an invalid state, where random values + * have been written to MSRs and then the MSRs are locked. + * Seems to always happen on warm reset. + * + * Power cycling or a board_reset() isn't sufficient in this case, so + * issue a full_reset() to "fix" this issue. + * + * It seems to be a deficiency in the reset logic, as other + * FSP broadwell DE boards are not affected. + */ + msr_t msr = rdmsr(IA32_FEATURE_CONTROL); + if (msr.lo & 1) { + printk(BIOS_EMERG, "Detected broken platform state. Issuing full reset\n"); + full_reset(); + } } /** -- cgit v1.2.3