From 8040fbf9fbd8f26ed4b53a54f92e5dcce20d4a1d Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Mon, 10 Jul 2017 18:26:28 -0600 Subject: soc/amd/stoneyridge: Fix GPIO bank1 control definition Change-Id: Ia6c7357ba0c581dc46d173f462efce181847a4e1 Signed-off-by: Marshall Dawson Reviewed-on: https://review.coreboot.org/20526 Reviewed-by: Paul Menzel Reviewed-by: Marc Jones Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/soc/amd/stoneyridge/include/soc/gpio.h | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/soc/amd/stoneyridge/include/soc/gpio.h b/src/soc/amd/stoneyridge/include/soc/gpio.h index a66701ac56..06933681c6 100644 --- a/src/soc/amd/stoneyridge/include/soc/gpio.h +++ b/src/soc/amd/stoneyridge/include/soc/gpio.h @@ -58,7 +58,7 @@ #define GPIO_42 (GPIO_BANK0_CONTROL + 0xa8) /* GPIO_64 - GPIO_127 */ -#define GPIO_BANK1 (CONTROL AMD_SB_ACPI_MMIO_ADDR + 0x1600) +#define GPIO_BANK1_CONTROL (AMD_SB_ACPI_MMIO_ADDR + 0x1600) #define GPIO_64 (GPIO_BANK1_CONTROL + 0x00) #define GPIO_65 (GPIO_BANK1_CONTROL + 0x04) #define GPIO_66 (GPIO_BANK1_CONTROL + 0x08) -- cgit v1.2.3