From 7c34865c9217c9d02dbfc2b5f7f939ef4d587728 Mon Sep 17 00:00:00 2001 From: Tim Wawrzynczak Date: Wed, 27 May 2020 10:22:45 -0600 Subject: soc/intel/apollolake: Reinstate APL_SKIP_SET_POWER_LIMITS The config option APL_SKIP_SET_POWER_LIMITS was accidentally left out during the set_power_limits refactor (SHA 2adb50d32e8). This patch reinstates the config option which will cause APL boards to not set any power limits. TEST=util/abuild/abuild -p none -t siemens/mc_apl1 -a Change-Id: Iec9f9f340d50a1212b6ef20c2c0e1b66385ae1b2 Signed-off-by: Tim Wawrzynczak Reviewed-on: https://review.coreboot.org/c/coreboot/+/41786 Tested-by: build bot (Jenkins) Reviewed-by: Werner Zeh Reviewed-by: Sumeet R Pawnikar --- src/soc/intel/apollolake/chip.c | 12 ++++++++---- 1 file changed, 8 insertions(+), 4 deletions(-) diff --git a/src/soc/intel/apollolake/chip.c b/src/soc/intel/apollolake/chip.c index cc190bae24..f9af4f49d9 100644 --- a/src/soc/intel/apollolake/chip.c +++ b/src/soc/intel/apollolake/chip.c @@ -322,10 +322,14 @@ static void soc_init(void *data) /* Allocate ACPI NVS in CBMEM */ cbmem_add(CBMEM_ID_ACPI_GNVS, sizeof(struct global_nvs_t)); - config = config_of_soc(); - /* Set RAPL MSR for Package power limits */ - soc_config = &config->power_limits_config; - set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config); + if (CONFIG(APL_SKIP_SET_POWER_LIMITS)) { + printk(BIOS_INFO, "Skip setting RAPL per configuration\n"); + } else { + config = config_of_soc(); + /* Set RAPL MSR for Package power limits */ + soc_config = &config->power_limits_config; + set_power_limits(MOBILE_SKU_PL1_TIME_SEC, soc_config); + } /* * FSP-S routes SCI to IRQ 9. With the help of this function you can -- cgit v1.2.3