From 7b9bca0b2b1830262daffd16f285e868d241391b Mon Sep 17 00:00:00 2001 From: huang lin Date: Thu, 3 Mar 2016 15:29:34 +0800 Subject: libpayload: mmu: Initialize the base 4GiB as device memory This allows to accommodate different platforms' default configurations, memory configuration is fine tuned later during boot process. BUG=chrome-os-partner:51537 BRANCH=none TEST=none yet, the full stack of patches boots fine on EVB Change-Id: I39da4ce247422f67451711ac0ed5a5e1119ed836 Signed-off-by: Patrick Georgi Original-Commit-Id: 97a9a71ade4df8a501043f9ae58463a3135e2a4f Original-Change-Id: I39da4ce247422f67451711ac0ed5a5e1119ed836 Original-Signed-off-by: huang lin Original-Signed-off-by: Vadim Bendebury Original-Reviewed-on: https://chromium-review.googlesource.com/332384 Original-Reviewed-by: Furquan Shaikh Reviewed-on: https://review.coreboot.org/13914 Tested-by: build bot (Jenkins) Reviewed-by: Aaron Durbin --- payloads/libpayload/arch/arm64/mmu.c | 11 +++++++++-- 1 file changed, 9 insertions(+), 2 deletions(-) diff --git a/payloads/libpayload/arch/arm64/mmu.c b/payloads/libpayload/arch/arm64/mmu.c index f07e4c435c..553b2d5fc2 100644 --- a/payloads/libpayload/arch/arm64/mmu.c +++ b/payloads/libpayload/arch/arm64/mmu.c @@ -260,7 +260,7 @@ void mmu_config_range(void *start, size_t size, uint64_t tag) * Desc : Initialize mmu based on the mmu_memrange passed. ttb_buffer is used as * the base address for xlat tables. TTB_DEFAULT_SIZE defines the max number of * tables that can be used - * Assuming that memory 0-2GiB is device memory. + * Assuming that memory 0-4GiB is device memory. */ uint64_t mmu_init(struct mmu_ranges *mmu_ranges) { @@ -275,7 +275,14 @@ uint64_t mmu_init(struct mmu_ranges *mmu_ranges) printf("Libpayload ARM64: TTB_BUFFER: 0x%p Max Tables: %d\n", (void*)xlat_addr, max_tables); - mmu_config_range(NULL, 0x80000000, TYPE_DEV_MEM); + /* + * To keep things simple we start with mapping the entire base 4GB as + * device memory. This accommodates various architectures' default + * settings (for instance rk3399 mmio starts at 0xf8000000); it is + * fine tuned (e.g. mapping DRAM areas as write-back) later in the + * boot process. + */ + mmu_config_range(NULL, 0x100000000, TYPE_DEV_MEM); for (; i < mmu_ranges->used; i++) mmu_config_range((void *)mmu_ranges->entries[i].base, -- cgit v1.2.3