From 7b7b33e3a615b0581df9e8e371fb218e97ba2a51 Mon Sep 17 00:00:00 2001 From: Kane Chen Date: Tue, 4 May 2021 09:49:18 +0800 Subject: soc/intel/{adl,tgl,jsl}: Add smihandler_soc_disable_busmaster If a power button SMI is triggered between where it is currently enabled and before FSP-S exits, when the SMI handler disables bus mastering for all devices, it inadvertently also disables the PMC's I/O decoding, so the register write to actually go into S5 does not succeed, and the system hangs. This can be solved by skipping the PMC when disabling bus mastering in the SMI handler, for which a callback, smihandler_soc_disable_busmaster is provided. BUG=b:186194102, b:186815114 TEST=Power on the system and pressing power button repeatedly doesn't cause the system hang during shutdown. Change-Id: I1cf5cf91ebad4a49df6679e01fc88ff60c81526c Signed-off-by: Kane Chen Reviewed-on: https://review.coreboot.org/c/coreboot/+/52873 Tested-by: build bot (Jenkins) Reviewed-by: Tim Wawrzynczak --- src/soc/intel/alderlake/smihandler.c | 8 ++++++++ src/soc/intel/jasperlake/smihandler.c | 8 ++++++++ src/soc/intel/tigerlake/smihandler.c | 8 ++++++++ 3 files changed, 24 insertions(+) diff --git a/src/soc/intel/alderlake/smihandler.c b/src/soc/intel/alderlake/smihandler.c index a072138c96..5b53038834 100644 --- a/src/soc/intel/alderlake/smihandler.c +++ b/src/soc/intel/alderlake/smihandler.c @@ -24,6 +24,14 @@ void smihandler_soc_at_finalize(void) heci_disable(); } +int smihandler_soc_disable_busmaster(pci_devfn_t dev) +{ + /* Skip disabling PMC bus master to keep IO decode enabled */ + if (dev == PCH_DEV_PMC) + return 0; + return 1; +} + const smi_handler_t southbridge_smi[SMI_STS_BITS] = { [SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep, [APM_STS_BIT] = smihandler_southbridge_apmc, diff --git a/src/soc/intel/jasperlake/smihandler.c b/src/soc/intel/jasperlake/smihandler.c index 448c0539d7..2e38b68768 100644 --- a/src/soc/intel/jasperlake/smihandler.c +++ b/src/soc/intel/jasperlake/smihandler.c @@ -24,6 +24,14 @@ void smihandler_soc_at_finalize(void) heci_disable(); } +int smihandler_soc_disable_busmaster(pci_devfn_t dev) +{ + /* Skip disabling PMC bus master to keep IO decode enabled */ + if (dev == PCH_DEV_PMC) + return 0; + return 1; +} + const smi_handler_t southbridge_smi[SMI_STS_BITS] = { [SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep, [APM_STS_BIT] = smihandler_southbridge_apmc, diff --git a/src/soc/intel/tigerlake/smihandler.c b/src/soc/intel/tigerlake/smihandler.c index 67d21f8e33..6280fb28bd 100644 --- a/src/soc/intel/tigerlake/smihandler.c +++ b/src/soc/intel/tigerlake/smihandler.c @@ -24,6 +24,14 @@ void smihandler_soc_at_finalize(void) heci_disable(); } +int smihandler_soc_disable_busmaster(pci_devfn_t dev) +{ + /* Skip disabling PMC bus master to keep IO decode enabled */ + if (dev == PCH_DEV_PMC) + return 0; + return 1; +} + const smi_handler_t southbridge_smi[SMI_STS_BITS] = { [SMI_ON_SLP_EN_STS_BIT] = smihandler_southbridge_sleep, [APM_STS_BIT] = smihandler_southbridge_apmc, -- cgit v1.2.3