From 79df32d083d7454ef73f7bd31b1c8e6237406385 Mon Sep 17 00:00:00 2001 From: Dtrain Hsu Date: Mon, 23 May 2022 17:43:07 +0800 Subject: mb/google/brya/var/kinox: Update the DPTF parameters Follow the Thermal_paramters_list-0520.xlsx to modify DPTF baseline PL1 values. 1. Modify baseline PL1 min_power from 15000 to 12000. 2. Modify baseline PL1 max_power from 17000 to 25000. BUG=b:231380286 TEST=emerge-brask coreboot Signed-off-by: Dtrain Hsu Change-Id: Ibd3098ee6bbf964cffddfcc9a4600cb7d81162d9 Reviewed-on: https://review.coreboot.org/c/coreboot/+/64595 Reviewed-by: Sumeet R Pawnikar Reviewed-by: Ricky Chang Tested-by: build bot (Jenkins) --- src/mainboard/google/brya/variants/kinox/overridetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/brya/variants/kinox/overridetree.cb b/src/mainboard/google/brya/variants/kinox/overridetree.cb index bb16785689..0ae60de544 100644 --- a/src/mainboard/google/brya/variants/kinox/overridetree.cb +++ b/src/mainboard/google/brya/variants/kinox/overridetree.cb @@ -144,8 +144,8 @@ chip soc/intel/alderlake register "controls.power_limits" = "{ .pl1 = { - .min_power = 15000, - .max_power = 17000, + .min_power = 12000, + .max_power = 25000, .time_window_min = 28 * MSECS_PER_SEC, .time_window_max = 28 * MSECS_PER_SEC, .granularity = 500, -- cgit v1.2.3