From 71139b2048cc9d80e20985111a1e736ee986d50c Mon Sep 17 00:00:00 2001
From: John Su <john_su@compal.corp-partner.google.com>
Date: Thu, 7 Jul 2022 15:55:57 +0800
Subject: mb/google/brya/variants/felwinter: Add fw_config to control TBT PCIe
 RP0

Use USB4 fw_config to enable TBT PCIe RP0.

BUG=b:237619214, b:237623610
TEST=emerge-brya coreboot chromeos-bootimage

Signed-off-by: John Su <john_su@compal.corp-partner.google.com>
Change-Id: Ie3e51a0f30e0c9d20127c017436813d4ede95639
Reviewed-on: https://review.coreboot.org/c/coreboot/+/65696
Reviewed-by: Frank Wu <frank_wu@compal.corp-partner.google.com>
Reviewed-by: Dtrain Hsu <dtrain_hsu@compal.corp-partner.google.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Eric Lai <eric_lai@quanta.corp-partner.google.com>
---
 src/mainboard/google/brya/variants/felwinter/overridetree.cb | 4 +++-
 1 file changed, 3 insertions(+), 1 deletion(-)

diff --git a/src/mainboard/google/brya/variants/felwinter/overridetree.cb b/src/mainboard/google/brya/variants/felwinter/overridetree.cb
index 06b351800c..31a90656c4 100644
--- a/src/mainboard/google/brya/variants/felwinter/overridetree.cb
+++ b/src/mainboard/google/brya/variants/felwinter/overridetree.cb
@@ -181,7 +181,9 @@ chip soc/intel/alderlake
 				device generic 0 alias dptf_policy on end
 			end
 		end
-		device ref tbt_pcie_rp0 on end
+		device ref tbt_pcie_rp0 on
+			probe DB_USB USB4_KB8001
+		end
 		device ref tbt_pcie_rp1 on
 			probe DB_USB USB4_KB8001
 		end
-- 
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