From 706aabcd4c8cad2176d42afdd47c3ecb6467bc98 Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Fri, 9 Feb 2018 08:49:32 +0100 Subject: nb/intel/nehalem: Get rid of device_t Use of `device_t` has been abandoned in ramstage. Change-Id: Idcb8ff4081f2c45427aabb455a70fae1b46bcfc4 Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/23674 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- src/northbridge/intel/nehalem/gma.c | 6 +++--- src/northbridge/intel/nehalem/northbridge.c | 14 +++++++------- 2 files changed, 10 insertions(+), 10 deletions(-) diff --git a/src/northbridge/intel/nehalem/gma.c b/src/northbridge/intel/nehalem/gma.c index 4dcbfb30ee..6b8b98e1d5 100644 --- a/src/northbridge/intel/nehalem/gma.c +++ b/src/northbridge/intel/nehalem/gma.c @@ -1080,7 +1080,7 @@ static void gma_func0_init(struct device *dev) intel_gma_restore_opregion(); } -static void gma_set_subsystem(device_t dev, unsigned vendor, unsigned device) +static void gma_set_subsystem(struct device *dev, unsigned vendor, unsigned device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, @@ -1114,7 +1114,7 @@ static void gma_read_resources(struct device *dev) const struct i915_gpu_controller_info * intel_gma_get_controller_info(void) { - device_t dev = dev_find_slot(0, PCI_DEVFN(0x2,0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0x2,0)); if (!dev) { return NULL; } @@ -1122,7 +1122,7 @@ intel_gma_get_controller_info(void) return &chip->gfx; } -static void gma_ssdt(device_t device) +static void gma_ssdt(struct device *device) { const struct i915_gpu_controller_info *gfx = intel_gma_get_controller_info(); if (!gfx) { diff --git a/src/northbridge/intel/nehalem/northbridge.c b/src/northbridge/intel/nehalem/northbridge.c index b09460c857..37662d5fe6 100644 --- a/src/northbridge/intel/nehalem/northbridge.c +++ b/src/northbridge/intel/nehalem/northbridge.c @@ -87,7 +87,7 @@ static void add_fixed_resources(struct device *dev, int index) #endif } -static void pci_domain_set_resources(device_t dev) +static void pci_domain_set_resources(struct device *dev) { assign_resources(dev->link_list); } @@ -101,7 +101,7 @@ static struct device_operations pci_domain_ops = { .ops_pci_bus = pci_bus_default_ops, }; -static void mc_read_resources(device_t dev) +static void mc_read_resources(struct device *dev) { uint32_t tseg_base; uint64_t TOUUD; @@ -156,18 +156,18 @@ static void mc_read_resources(device_t dev) u32 northbridge_get_tseg_base(void) { - const device_t dev = dev_find_slot(0, PCI_DEVFN(0, 0)); + struct device *dev = dev_find_slot(0, PCI_DEVFN(0, 0)); return pci_read_config32(dev, TSEG) & ~1; } -static void mc_set_resources(device_t dev) +static void mc_set_resources(struct device *dev) { /* And call the normal set_resources */ pci_dev_set_resources(dev); } -static void intel_set_subsystem(device_t dev, unsigned vendor, unsigned device) +static void intel_set_subsystem(struct device *dev, unsigned vendor, unsigned device) { if (!vendor || !device) { pci_write_config32(dev, PCI_SUBSYSTEM_VENDOR_ID, @@ -299,7 +299,7 @@ static const struct pci_driver mc_driver_44 __pci_driver = { .device = 0x0044, /* Nehalem */ }; -static void cpu_bus_init(device_t dev) +static void cpu_bus_init(struct device *dev) { initialize_cpus(dev->link_list); } @@ -312,7 +312,7 @@ static struct device_operations cpu_bus_ops = { .scan_bus = 0, }; -static void enable_dev(device_t dev) +static void enable_dev(struct device *dev) { /* Set the operations if it is a special bus type */ if (dev->path.type == DEVICE_PATH_DOMAIN) { -- cgit v1.2.3