From 6fb87c2b7705f8266a4468740c31c1a372c9da88 Mon Sep 17 00:00:00 2001 From: Angel Pons Date: Fri, 30 Oct 2020 20:40:48 +0100 Subject: soc/intel/broadwell/pch/lpc.c: Program GEN_PMCON_3 in one write This is what Lynxpoint does. It is equivalent, but simpler. Change-Id: Ifdbb291a6cea0bb29b4e46c7a33c5abe61dbe86b Signed-off-by: Angel Pons Reviewed-on: https://review.coreboot.org/c/coreboot/+/47045 Reviewed-by: Nico Huber Tested-by: build bot (Jenkins) --- src/soc/intel/broadwell/pch/lpc.c | 22 +++++++++------------- 1 file changed, 9 insertions(+), 13 deletions(-) diff --git a/src/soc/intel/broadwell/pch/lpc.c b/src/soc/intel/broadwell/pch/lpc.c index 4cb16201ad..84b8d00938 100644 --- a/src/soc/intel/broadwell/pch/lpc.c +++ b/src/soc/intel/broadwell/pch/lpc.c @@ -156,6 +156,15 @@ static void pch_power_options(struct device *dev) default: state = "undefined"; } + + reg16 &= ~(3 << 4); /* SLP_S4# Assertion Stretch 4s */ + reg16 |= (1 << 3); /* SLP_S4# Assertion Stretch Enable */ + + reg16 &= ~(1 << 10); + reg16 |= (1 << 11); /* SLP_S3# Min Assertion Width 50ms */ + + reg16 |= (1 << 12); /* Disable SLP stretch after SUS well */ + pci_write_config16(dev, GEN_PMCON_3, reg16); printk(BIOS_INFO, "Set power %s after power failure.\n", state); @@ -174,21 +183,8 @@ static void pch_power_options(struct device *dev) static void pch_misc_init(struct device *dev) { u8 reg8; - u16 reg16; u32 reg32; - reg16 = pci_read_config16(dev, GEN_PMCON_3); - - reg16 &= ~(3 << 4); /* SLP_S4# Assertion Stretch 4s */ - reg16 |= (1 << 3); /* SLP_S4# Assertion Stretch Enable */ - - reg16 &= ~(1 << 10); - reg16 |= (1 << 11); /* SLP_S3# Min Assertion Width 50ms */ - - reg16 |= (1 << 12); /* Disable SLP stretch after SUS well */ - - pci_write_config16(dev, GEN_PMCON_3, reg16); - /* Prepare sleep mode */ reg32 = inl(ACPI_BASE_ADDRESS + PM1_CNT); reg32 &= ~SLP_TYP; -- cgit v1.2.3