From 6da1710fbc2a1795d879e16822523c22b372afe1 Mon Sep 17 00:00:00 2001 From: Johnny Lin Date: Tue, 11 Aug 2020 10:35:39 +0800 Subject: mb/ocp/deltalake: Configure FSP DCI via VPD Tested on OCP Delta Lake, with FSP WW34 DCI can be connected if enabled. Change-Id: I8e0dff921cef02dfc66467a2b8fa3e196fb36ac2 Signed-off-by: Johnny Lin Reviewed-on: https://review.coreboot.org/c/coreboot/+/44363 Tested-by: build bot (Jenkins) Reviewed-by: Paul Menzel Reviewed-by: Angel Pons --- src/mainboard/ocp/deltalake/romstage.c | 10 ++++++++++ src/mainboard/ocp/deltalake/vpd.h | 4 ++++ 2 files changed, 14 insertions(+) diff --git a/src/mainboard/ocp/deltalake/romstage.c b/src/mainboard/ocp/deltalake/romstage.c index f69ec60c73..71a26c8789 100644 --- a/src/mainboard/ocp/deltalake/romstage.c +++ b/src/mainboard/ocp/deltalake/romstage.c @@ -49,6 +49,16 @@ static void mainboard_config_upd(FSPM_UPD *mupd) mupd->FspmConfig.DebugPrintLevel = FSP_LOG_LEVEL_DEFAULT; } } + + /* Enable DCI */ + if (vpd_get_bool(FSP_DCI, VPD_RW_THEN_RO, &val)) { + printk(BIOS_DEBUG, "Setting DciEn %d from VPD\n", val); + mupd->FspmConfig.PchDciEn = val; + } else { + printk(BIOS_INFO, "Not able to get VPD %s, default set " + "DciEn to %d\n", FSP_DCI, FSP_DCI_DEFAULT); + mupd->FspmConfig.PchDciEn = FSP_DCI_DEFAULT; + } } /* Update bifurcation settings according to different Configs */ diff --git a/src/mainboard/ocp/deltalake/vpd.h b/src/mainboard/ocp/deltalake/vpd.h index 39efd73ea9..ae2099d025 100644 --- a/src/mainboard/ocp/deltalake/vpd.h +++ b/src/mainboard/ocp/deltalake/vpd.h @@ -28,4 +28,8 @@ #define FSP_LOG_LEVEL "fsp_log_level" #define FSP_LOG_LEVEL_DEFAULT 8 /* Default value when the VPD variable is not found */ +/* DCI enable */ +#define FSP_DCI "fsp_dci_enable" /* 1 or 0: enable or disable DCI */ +#define FSP_DCI_DEFAULT 0 /* Default value when the VPD variable is not found */ + #endif -- cgit v1.2.3