From 65e54662e35508623505e1d01c23c6c5caf7e2de Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 1 Sep 2017 07:10:56 +0300 Subject: intel/car: Fix stack guard placement MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Make sure guard placement is above CAR region. Change-Id: I780cdc0b2a549e7ac4b23b0870619f5648a644e7 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/21313 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/cpu/intel/car/romstage.c | 17 ++++++++++++++--- 1 file changed, 14 insertions(+), 3 deletions(-) diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c index 14776126c8..555c3846b4 100644 --- a/src/cpu/intel/car/romstage.c +++ b/src/cpu/intel/car/romstage.c @@ -15,6 +15,7 @@ #include #include #include +#include #include #define DCACHE_RAM_ROMSTAGE_STACK_SIZE 0x2000 @@ -25,9 +26,19 @@ asmlinkage void *romstage_main(unsigned long bist) void *romstage_stack_after_car; const int num_guards = 4; const u32 stack_guard = 0xdeadbeef; - u32 *stack_base = (void *)(CONFIG_DCACHE_RAM_BASE + - CONFIG_DCACHE_RAM_SIZE - - DCACHE_RAM_ROMSTAGE_STACK_SIZE); + u32 *stack_base; + u32 size; + + /* Size of unallocated CAR. */ + size = _car_region_end - _car_relocatable_data_end; + size = ALIGN_DOWN(size, 16); + + size = MIN(size, DCACHE_RAM_ROMSTAGE_STACK_SIZE); + if (size < DCACHE_RAM_ROMSTAGE_STACK_SIZE) + printk(BIOS_DEBUG, "Romstage stack size limited to 0x%x!\n", + size); + + stack_base = (u32 *) (_car_region_end - size); for (i = 0; i < num_guards; i++) stack_base[i] = stack_guard; -- cgit v1.2.3