From 65535332db1f94bbe08928f7c0e52f01cb26c1c1 Mon Sep 17 00:00:00 2001 From: Wim Vervoorn Date: Thu, 2 Apr 2020 14:57:00 +0200 Subject: mb/facebook/monolith: Add fmd files for 6MB BIOS area The current flash layout requires changes to the descriptor area to create the 9MB BIOS region. Add fmd files that allow switching to coreboot by only replacing the BIOS region. BUG=N/A TEST=tested on facebook monolith Change-Id: I2b003018e245693934202505d7e3891c2f545e6c Signed-off-by: Wim Vervoorn Reviewed-on: https://review.coreboot.org/c/coreboot/+/40040 Tested-by: build bot (Jenkins) Reviewed-by: Frans Hendriks --- src/mainboard/facebook/monolith/vboot-ro_6mb.fmd | 28 ++++++++++++++++++++ src/mainboard/facebook/monolith/vboot-rw_6mb.fmd | 33 ++++++++++++++++++++++++ 2 files changed, 61 insertions(+) create mode 100644 src/mainboard/facebook/monolith/vboot-ro_6mb.fmd create mode 100644 src/mainboard/facebook/monolith/vboot-rw_6mb.fmd diff --git a/src/mainboard/facebook/monolith/vboot-ro_6mb.fmd b/src/mainboard/facebook/monolith/vboot-ro_6mb.fmd new file mode 100644 index 0000000000..1bf6fb9bb4 --- /dev/null +++ b/src/mainboard/facebook/monolith/vboot-ro_6mb.fmd @@ -0,0 +1,28 @@ +FLASH 16M { + SI_ALL@0x0 0xA00000 { + SI_DESC@0x0 0x1000 + UNUSED_1@0x1000 0x2000 + SI_ME@0x3000 0x6fd000 + UNUSED_2@0x700000 0x300000 + } + SI_BIOS@0xA00000 0x600000 { + MISC_RW@0x0 0x20000 { + UNIFIED_MRC_CACHE@0x0 0x10000 { + RW_MRC_CACHE@0x00000 0x10000 + } + RW_VPD(PRESERVE)@0x010000 0x2000 + RW_NVRAM(PRESERVE)@0x012000 0x6000 + } + USED_BY_ORG_BIOS(PRESERVE)@0x20000 0x40000 + WP_RO@0x060000 0x5A0000 { + RO_VPD(PRESERVE)@0x00000 0x1000 + RO_SECTION@0x1000 0x59F000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0x4000 + COREBOOT(CBFS)@0x5000 0x59A000 + } + } + } +} diff --git a/src/mainboard/facebook/monolith/vboot-rw_6mb.fmd b/src/mainboard/facebook/monolith/vboot-rw_6mb.fmd new file mode 100644 index 0000000000..e10a5767be --- /dev/null +++ b/src/mainboard/facebook/monolith/vboot-rw_6mb.fmd @@ -0,0 +1,33 @@ +FLASH 16M { + SI_ALL@0x0 0xA00000 { + SI_DESC@0x0 0x1000 + UNUSED_1@0x1000 0x2000 + SI_ME@0x3000 0x6fd000 + UNUSED_2@0x700000 0x300000 + } + SI_BIOS@0xA00000 0x600000 { + MISC_RW@0x0 0x20000 { + UNIFIED_MRC_CACHE@0x0 0x10000 { + RW_MRC_CACHE@0x00000 0x10000 + } + RW_VPD(PRESERVE)@0x010000 0x2000 + RW_NVRAM(PRESERVE)@0x012000 0x6000 + } + USED_BY_ORG_BIOS(PRESERVE)@0x20000 0x40000 + RW_SECTION_A@0x60000 0x520000 { + VBLOCK_A@0x0 0x10000 + RW_FWID_A@0x10000 0x40 + FW_MAIN_A(CBFS)@0x10040 0x50FFC0 + } + WP_RO@0x580000 0x080000 { + RO_VPD(PRESERVE)@0x00000 0x1000 + RO_SECTION@0x1000 0x7F000 { + FMAP@0x0 0x800 + RO_FRID@0x800 0x40 + RO_FRID_PAD@0x840 0x7c0 + GBB@0x1000 0x4000 + COREBOOT(CBFS)@0x5000 0x07A000 + } + } + } +} -- cgit v1.2.3