From 653ba223df6b949743080f837760ed9c1264cca7 Mon Sep 17 00:00:00 2001 From: Krishna Prasad Bhat Date: Wed, 24 Apr 2024 11:51:59 +0530 Subject: common/block/tcss: Add config for PDC<->PMC mux configuration Introduce a new Kconfig to enable PD controller to PMC mux configuration. Selecting this config enables direct communication from PDC to PMC. TCSS_HAS_USBC_OPS enables USB-C operations via the EC. When SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION is selected, disable TCSS_HAS_USBC_OPS to avoid sending PMC commands from AP/EC. BUG=b:332383540 TEST=USB3 plugged during G3, is detected after system boots from G3. Cq-Depend: chromium:5484387 Cq-Depend: chrome-internal:7106592 Change-Id: Ieeb503393418cdad43384be39ac49c93ba91e4db Signed-off-by: Krishna Prasad Bhat Reviewed-on: https://review.coreboot.org/c/coreboot/+/82077 Reviewed-by: Karthik Ramasubramanian Tested-by: build bot (Jenkins) --- src/soc/intel/common/block/tcss/Kconfig | 10 +++++++++- 1 file changed, 9 insertions(+), 1 deletion(-) diff --git a/src/soc/intel/common/block/tcss/Kconfig b/src/soc/intel/common/block/tcss/Kconfig index 25113d33f3..89bab79235 100644 --- a/src/soc/intel/common/block/tcss/Kconfig +++ b/src/soc/intel/common/block/tcss/Kconfig @@ -6,10 +6,18 @@ config SOC_INTEL_COMMON_BLOCK_TCSS help Sets up USB2/3 port mapping in TCSS MUX +config SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION + def_bool n + help + TCSS uses PDC<->PMC communication to perform mux configuration. When this config is + enabled, communication happens directly between PDC and PMC. Avoid sending PMC + commands from AP/EC. + config TCSS_HAS_USBC_OPS bool "Enable USB-C MUX operations via the EC" default y if EC_GOOGLE_CHROMEEC - depends on SOC_INTEL_COMMON_BLOCK_TCSS + depends on SOC_INTEL_COMMON_BLOCK_TCSS && \ + !SOC_INTEL_TCSS_USE_PDC_PMC_USBC_MUX_CONFIGURATION help Enable USB-C operations via the EC. Requires `usbc_get_ops` to control features such as HPD and DP Mode entry. Currently, only the ChromeEC implements this, see -- cgit v1.2.3