From 5ee4c12ebb8ad82a62ab2325a9e972757534962e Mon Sep 17 00:00:00 2001
From: Subrata Banik <subrata.banik@intel.com>
Date: Fri, 5 Jul 2019 06:43:46 +0530
Subject: soc/intel/cannonlake: Override PRERAM_CBMEM_CONSOLE_SIZE default
 value

This patch increases PRERAM_CBMEM_CONSOLE_SIZE to fix
*** Pre-CBMEM romstage console overflowed, log truncated! ***
issue.

TEST=Verified on Hatch CML platform.

Change-Id: I2de4ca2f2001b304850c27df1b3c3b2c827fe25a
Signed-off-by: Subrata Banik <subrata.banik@intel.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/34006
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Reviewed-by: Spoorthi K
Reviewed-by: Nico Huber <nico.h@gmx.de>
---
 src/soc/intel/cannonlake/Kconfig | 4 ++++
 1 file changed, 4 insertions(+)

diff --git a/src/soc/intel/cannonlake/Kconfig b/src/soc/intel/cannonlake/Kconfig
index d697620725..5e405db4d8 100644
--- a/src/soc/intel/cannonlake/Kconfig
+++ b/src/soc/intel/cannonlake/Kconfig
@@ -326,4 +326,8 @@ config USE_LEGACY_8254_TIMER
 	  This sets the Enable8254ClockGating UPD, which according to the FSP Integration
 	  guide needs to be disabled in order to boot SeaBIOS, but should otherwise be enabled.
 
+config PRERAM_CBMEM_CONSOLE_SIZE
+	hex
+	default 0xe00
+
 endif
-- 
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