From 5588f34a35209f34d9061e6a83856289450d8131 Mon Sep 17 00:00:00 2001 From: Felix Singer Date: Sun, 5 Dec 2021 07:36:13 +0100 Subject: mainboard: Drop `SataMode` setting from Tiger Lake devicetrees All Tiger Lake mainboards use the default value for the setting `SataMode`. Thus, drop it from their devicetree. Change-Id: I291048250bc82552fde7c71a1dcda4894a61d465 Signed-off-by: Felix Singer Reviewed-on: https://review.coreboot.org/c/coreboot/+/59890 Reviewed-by: Angel Pons Tested-by: build bot (Jenkins) --- src/mainboard/google/deltaur/variants/baseboard/devicetree.cb | 1 - src/mainboard/google/volteer/variants/baseboard/devicetree.cb | 1 - 2 files changed, 2 deletions(-) diff --git a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb index aeab2d4bf2..067222440c 100644 --- a/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/deltaur/variants/baseboard/devicetree.cb @@ -25,7 +25,6 @@ chip soc/intel/tigerlake # FSP configuration register "SaGv" = "SaGv_Disabled" - register "SataMode" = "0" register "SataSalpSupport" = "1" # TODO: the lengths are all MID for right now. diff --git a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb index 1958e99791..a93a38a830 100644 --- a/src/mainboard/google/volteer/variants/baseboard/devicetree.cb +++ b/src/mainboard/google/volteer/variants/baseboard/devicetree.cb @@ -146,7 +146,6 @@ chip soc/intel/tigerlake register "PcieClkSrcUsage[6]" = "PCIE_CLK_NOTUSED" # Enable SATA - register "SataMode" = "0" register "SataSalpSupport" = "1" register "SataPortsEnable[0]" = "0" register "SataPortsEnable[1]" = "1" -- cgit v1.2.3