From 53ba14de1eef0a9106ea2752f33b702b46f99445 Mon Sep 17 00:00:00 2001 From: Tim Van Patten Date: Tue, 13 Sep 2022 15:42:01 -0600 Subject: amd/mendocino: Control DPTC with only Kconfig SOC_AMD_COMMON_BLOCK_ACPI_DPTC can be enabled conditionally for any skyrim boards, similar to mainboard/google/zork/Kconfig. This makes the value dptc_tablet_mode_enable redundant. This CL removes dptc_tablet_mode_enable so DPTC is controlled entirely with the Kconfig value SOC_AMD_COMMON_BLOCK_ACPI_DPTC. This means DPTC is only included for boards that actually enable it. BRANCH=none BUG=b:217911928 TEST=emerge-skyrim coreboot Signed-off-by: Tim Van Patten Change-Id: I73fca5a16826313219247f452d37fb526ad4f4df Reviewed-on: https://review.coreboot.org/c/coreboot/+/67639 Tested-by: build bot (Jenkins) Reviewed-by: Matt DeVillier Reviewed-by: Felix Held --- src/soc/amd/mendocino/chip.h | 2 -- src/soc/amd/mendocino/root_complex.c | 8 +++----- 2 files changed, 3 insertions(+), 7 deletions(-) diff --git a/src/soc/amd/mendocino/chip.h b/src/soc/amd/mendocino/chip.h index 7b33340736..68629d77a9 100644 --- a/src/soc/amd/mendocino/chip.h +++ b/src/soc/amd/mendocino/chip.h @@ -82,8 +82,6 @@ struct soc_amd_mendocino_config { uint32_t telemetry_vddcrsocfull_scale_current_mA; uint32_t telemetry_vddcrsocoffset; - bool dptc_enable; - /* The array index is the general purpose PCIe clock output number. Values in here aren't the values written to the register to have the default to be always on. */ enum { diff --git a/src/soc/amd/mendocino/root_complex.c b/src/soc/amd/mendocino/root_complex.c index ec1e2304a2..fd62130fa1 100644 --- a/src/soc/amd/mendocino/root_complex.c +++ b/src/soc/amd/mendocino/root_complex.c @@ -188,10 +188,7 @@ static void acipgen_dptci(void) { const struct soc_amd_mendocino_config *config = config_of_soc(); - if (!config->dptc_enable) - return; - - /* DPTC is enabled. Always fill out the default DPTC values. */ + /* Normal mode DPTC values. */ struct dptc_input default_input = DPTC_INPUTS(config->thermctl_limit_degreeC, config->sustained_power_limit_mW, config->fast_ppt_limit_mW, @@ -202,7 +199,8 @@ static void acipgen_dptci(void) static void root_complex_fill_ssdt(const struct device *device) { acpi_fill_root_complex_tom(device); - acipgen_dptci(); + if (CONFIG(SOC_AMD_COMMON_BLOCK_ACPI_DPTC)) + acipgen_dptci(); } static const char *gnb_acpi_name(const struct device *dev) -- cgit v1.2.3