From 538a570c9809a20ac184a5ca747fdf69f9ccbbb1 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Fri, 18 Aug 2017 17:08:04 +0300 Subject: sb/via/k8t890: Define ACPI sleep states MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: I9afd5eaab5f8e897dea037f32e1666ad31b0f8df Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/21144 Tested-by: build bot (Jenkins) Reviewed-by: Marc Jones --- src/mainboard/asus/a8v-e_deluxe/dsdt.asl | 8 +------ src/mainboard/asus/a8v-e_se/dsdt.asl | 8 +------ src/mainboard/asus/k8v-x/dsdt.asl | 8 +------ src/mainboard/asus/m2v-mx_se/dsdt.asl | 10 +------- src/mainboard/asus/m2v/dsdt.asl | 17 +------------- src/southbridge/via/k8t890/acpi/sleepstates.asl | 31 +++++++++++++++++++++++++ 6 files changed, 36 insertions(+), 46 deletions(-) create mode 100644 src/southbridge/via/k8t890/acpi/sleepstates.asl diff --git a/src/mainboard/asus/a8v-e_deluxe/dsdt.asl b/src/mainboard/asus/a8v-e_deluxe/dsdt.asl index 0bb93ca117..06cc76accd 100644 --- a/src/mainboard/asus/a8v-e_deluxe/dsdt.asl +++ b/src/mainboard/asus/a8v-e_deluxe/dsdt.asl @@ -20,13 +20,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1) { - /* For now only define 2 power states: - * - S0 which is fully on - * - S5 which is soft off - * Any others would involve declaring the wake up methods. - */ - Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) - Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 }) + #include /* Root of the bus hierarchy */ Scope (\_SB) diff --git a/src/mainboard/asus/a8v-e_se/dsdt.asl b/src/mainboard/asus/a8v-e_se/dsdt.asl index ab75c9fa8b..1da24173e3 100644 --- a/src/mainboard/asus/a8v-e_se/dsdt.asl +++ b/src/mainboard/asus/a8v-e_se/dsdt.asl @@ -22,13 +22,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1) { #include "northbridge/amd/amdk8/util.asl" - /* For now only define 2 power states: - * - S0 which is fully on - * - S5 which is soft off - * Any others would involve declaring the wake up methods. - */ - Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) - Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 }) + #include /* Root of the bus hierarchy */ Scope (\_SB) diff --git a/src/mainboard/asus/k8v-x/dsdt.asl b/src/mainboard/asus/k8v-x/dsdt.asl index 09768fad18..fc96e7630c 100644 --- a/src/mainboard/asus/k8v-x/dsdt.asl +++ b/src/mainboard/asus/k8v-x/dsdt.asl @@ -22,13 +22,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1) { #include "northbridge/amd/amdk8/util.asl" - /* For now only define 2 power states: - * - S0 which is fully on - * - S5 which is soft off - * Any others would involve declaring the wake up methods. - */ - Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) - Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 }) + #include /* Root of the bus hierarchy */ Scope (\_SB) diff --git a/src/mainboard/asus/m2v-mx_se/dsdt.asl b/src/mainboard/asus/m2v-mx_se/dsdt.asl index 01cee11bed..30ce550996 100644 --- a/src/mainboard/asus/m2v-mx_se/dsdt.asl +++ b/src/mainboard/asus/m2v-mx_se/dsdt.asl @@ -22,15 +22,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 1, "CORE ", "COREBOOT", 1) { #include "northbridge/amd/amdk8/util.asl" - /* For now only define 2 power states: - * - S0 which is fully on - * - S5 which is soft off - * Any others would involve declaring the wake up methods. - */ - Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) - Name (\_S3, Package () { 0x01, 0x01, 0x00, 0x00 }) - Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 }) - + #include /* blink a LED when entering the sleep (any type) */ Method (_PTS, 1, NotSerialized) diff --git a/src/mainboard/asus/m2v/dsdt.asl b/src/mainboard/asus/m2v/dsdt.asl index 0753082229..760d5e214c 100644 --- a/src/mainboard/asus/m2v/dsdt.asl +++ b/src/mainboard/asus/m2v/dsdt.asl @@ -55,22 +55,7 @@ DefinitionBlock ("DSDT.aml", "DSDT", 2, "CORE ", "COREBOOT", 1) /* _PR CPU0 is dynamically supplied by SSDT */ - /* We define 3 power states: - * - S0 which is fully on - * - S3 which is suspend to ram - * - S5 which is soft off - * - * Package contents: - * ofs len desc - * 0 1 Value for PM1a_CNT.SLP_TYP register to enter this system state. - * 1 1 Value for PM1b_CNT.SLP_TYP register to enter this system state. To enter any - * given state, OSPM must write the PM1a_CNT.SLP_TYP register before the - * PM1b_CNT.SLP_TYP register. - * 2 2 Reserved - */ - Name (\_S0, Package () { 0x00, 0x00, 0x00, 0x00 }) - Name (\_S3, Package () { 0x01, 0x01, 0x00, 0x00 }) - Name (\_S5, Package () { 0x02, 0x02, 0x00, 0x00 }) + #include /* Root of the bus hierarchy */ Scope (\_SB) diff --git a/src/southbridge/via/k8t890/acpi/sleepstates.asl b/src/southbridge/via/k8t890/acpi/sleepstates.asl new file mode 100644 index 0000000000..487055548c --- /dev/null +++ b/src/southbridge/via/k8t890/acpi/sleepstates.asl @@ -0,0 +1,31 @@ +/* + * This file is part of the coreboot project. + * + * Copyright (C) 2007-2009 coresystems GmbH + * Copyright (C) 2007 Rudolf Marek + * + * This program is free software; you can redistribute it and/or modify + * it under the terms of the GNU General Public License as published by + * the Free Software Foundation; version 2 of the License. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + */ + +/* S1 support: bit 0, S2 Support: bit 1, etc. S0 & S5 assumed */ +#if IS_ENABLED(CONFIG_HAVE_ACPI_RESUME) +Name (SSFG, 0x04) +#else +Name (SSFG, 0x00) +#endif + +/* Supported sleep states: */ +Name(\_S0, Package () {0x00, 0x00, 0x00, 0x00} ) /* (S0) - working state */ + +If (And(SSFG, 0x04)) { + Name(\_S3, Package () {0x01, 0x01, 0x00, 0x00} ) /* (S3) - Suspend to RAM */ +} + +Name(\_S5, Package () {0x02, 0x02, 0x00, 0x00} ) /* (S5) - Soft Off */ -- cgit v1.2.3