From 52742b6dbd22203a919fb7555953e2839e6e776f Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sat, 25 Mar 2023 02:50:43 +0100 Subject: soc/amd/common/acpi/cpu_power_state: introduce and use get_pstate_0_reg On the Zen-based CPUs, P state 0 corresponds to the first P state MSR, but on Stoneyridge this isn't the case. Introduce get_pstate_0_reg that returns 0 for all non-CAR AMD CPUs. Signed-off-by: Felix Held Change-Id: Icc11e5b6099d37edb934e66fe329d8013d25f68d Reviewed-on: https://review.coreboot.org/c/coreboot/+/74021 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/soc/amd/common/block/acpi/cpu_power_state.c | 5 +++-- src/soc/amd/common/block/cpu/noncar/cpu.c | 5 +++++ src/soc/amd/common/block/include/amdblocks/cpu.h | 1 + 3 files changed, 9 insertions(+), 2 deletions(-) diff --git a/src/soc/amd/common/block/acpi/cpu_power_state.c b/src/soc/amd/common/block/acpi/cpu_power_state.c index 2cfc3cb57c..55fff3507c 100644 --- a/src/soc/amd/common/block/acpi/cpu_power_state.c +++ b/src/soc/amd/common/block/acpi/cpu_power_state.c @@ -59,13 +59,14 @@ static size_t get_pstate_info(struct acpi_sw_pstate *pstate_values, { union pstate_msr pstate_reg; size_t pstate_count, pstate; - uint32_t max_pstate; + uint32_t pstate_0_reg, max_pstate; pstate_count = 0; + pstate_0_reg = get_pstate_0_reg(); max_pstate = get_visible_pstate_count(); for (pstate = 0; pstate <= max_pstate; pstate++) { - pstate_reg.raw = rdmsr(PSTATE_MSR(pstate)).raw; + pstate_reg.raw = rdmsr(PSTATE_MSR(pstate_0_reg + pstate)).raw; if (!pstate_reg.pstate_en) continue; diff --git a/src/soc/amd/common/block/cpu/noncar/cpu.c b/src/soc/amd/common/block/cpu/noncar/cpu.c index 3f78aa4211..609aed8d38 100644 --- a/src/soc/amd/common/block/cpu/noncar/cpu.c +++ b/src/soc/amd/common/block/cpu/noncar/cpu.c @@ -7,6 +7,11 @@ #include #include +uint32_t get_pstate_0_reg(void) +{ + return 0; +} + unsigned int smbios_processor_family(struct cpuid_result res) { return 0x6b; /* Zen */ diff --git a/src/soc/amd/common/block/include/amdblocks/cpu.h b/src/soc/amd/common/block/include/amdblocks/cpu.h index 18b300dfdd..a6602336f5 100644 --- a/src/soc/amd/common/block/include/amdblocks/cpu.h +++ b/src/soc/amd/common/block/include/amdblocks/cpu.h @@ -17,6 +17,7 @@ void write_resume_eip(void); union pstate_msr; /* proper definition is in soc/msr.h */ uint32_t get_uvolts_from_vid(uint16_t core_vid); +uint32_t get_pstate_0_reg(void); uint32_t get_pstate_core_freq(union pstate_msr pstate_reg); uint32_t get_pstate_core_uvolts(union pstate_msr pstate_reg); const acpi_cstate_t *get_cstate_config_data(size_t *size); -- cgit v1.2.3