From 52331ba4f7f08ea3c27d5d7c87b4078dea14c42d Mon Sep 17 00:00:00 2001 From: Subrata Banik Date: Mon, 11 Mar 2019 11:53:12 +0530 Subject: drivers/intel/fsp2_0: Add provision to include PPI directory This patch adds a generic provision into FSP2.0 driver to implement dedicated PEIM to PEIM interface as per Intel FSP requirement. Change-Id: I988d55890f8dd95ccf80c1f1ec2eba8196ddf9a7 Signed-off-by: Subrata Banik Reviewed-on: https://review.coreboot.org/c/coreboot/+/31836 Tested-by: build bot (Jenkins) Reviewed-by: Philipp Deppenwiese --- src/drivers/intel/fsp2_0/Kconfig | 11 +++++++++++ src/drivers/intel/fsp2_0/Makefile.inc | 3 +++ 2 files changed, 14 insertions(+) diff --git a/src/drivers/intel/fsp2_0/Kconfig b/src/drivers/intel/fsp2_0/Kconfig index 8e64c6b0d2..3951e9a959 100644 --- a/src/drivers/intel/fsp2_0/Kconfig +++ b/src/drivers/intel/fsp2_0/Kconfig @@ -172,4 +172,15 @@ config FSP_PLATFORM_MEMORY_SETTINGS_VERSIONS This allows deployed systems to bump their version number with the same FSP which will trigger a retrain of the memory. +config FSP_PEIM_TO_PEIM_INTERFACE + bool + help + This option allows SOC user to create specific PPI for Intel FSP + usage, coreboot will provide required PPI structure definitions + along with all APIs as per EFI specification. + +if FSP_PEIM_TO_PEIM_INTERFACE +source "src/drivers/intel/fsp2_0/ppi/Kconfig" +endif + endif diff --git a/src/drivers/intel/fsp2_0/Makefile.inc b/src/drivers/intel/fsp2_0/Makefile.inc index 79fe5f8d3e..f26a776133 100644 --- a/src/drivers/intel/fsp2_0/Makefile.inc +++ b/src/drivers/intel/fsp2_0/Makefile.inc @@ -82,4 +82,7 @@ ifneq ($(call strip_quotes,$(CONFIG_FSP_HEADER_PATH)),) CPPFLAGS_common+=-I$(CONFIG_FSP_HEADER_PATH) endif +# Include PPI directory of CONFIG_FSP_PEIM_TO_PEIM_INTERFACE is enable +subdirs-$(CONFIG_FSP_PEIM_TO_PEIM_INTERFACE) += ppi + endif -- cgit v1.2.3