From 507fc03b19faededb3ada50fa9f759f79786c8f5 Mon Sep 17 00:00:00 2001 From: Felix Held Date: Sat, 5 Dec 2020 01:55:27 +0100 Subject: soc/amd/picasso: remove config_t typedef Change-Id: Idc0061e7b88134ab17cb65429133cffd16ca5651 Signed-off-by: Felix Held Reviewed-on: https://review.coreboot.org/c/coreboot/+/48316 Tested-by: build bot (Jenkins) Reviewed-by: Marshall Dawson --- src/soc/amd/picasso/chip.h | 2 -- src/soc/amd/picasso/romstage.c | 2 +- src/soc/amd/picasso/root_complex.c | 2 +- 3 files changed, 2 insertions(+), 4 deletions(-) diff --git a/src/soc/amd/picasso/chip.h b/src/soc/amd/picasso/chip.h index 412cc087b1..27f1a2ad84 100644 --- a/src/soc/amd/picasso/chip.h +++ b/src/soc/amd/picasso/chip.h @@ -221,6 +221,4 @@ struct soc_amd_picasso_config { enum gpp_clk_req_setting gpp_clk_config[GPP_CLK_OUTPUT_COUNT]; }; -typedef struct soc_amd_picasso_config config_t; - #endif /* __PICASSO_CHIP_H__ */ diff --git a/src/soc/amd/picasso/romstage.c b/src/soc/amd/picasso/romstage.c index 9be970ddac..bf66759a94 100644 --- a/src/soc/amd/picasso/romstage.c +++ b/src/soc/amd/picasso/romstage.c @@ -90,7 +90,7 @@ static bool devtree_sata_dev_enabled(void) void platform_fsp_memory_init_params_cb(FSPM_UPD *mupd, uint32_t version) { FSP_M_CONFIG *mcfg = &mupd->FspmConfig; - const config_t *config = config_of_soc(); + const struct soc_amd_picasso_config *config = config_of_soc(); mupd->FspmArchUpd.NvsBufferPtr = soc_fill_mrc_cache(); diff --git a/src/soc/amd/picasso/root_complex.c b/src/soc/amd/picasso/root_complex.c index 90d2d4e8b0..259419cb97 100644 --- a/src/soc/amd/picasso/root_complex.c +++ b/src/soc/amd/picasso/root_complex.c @@ -195,7 +195,7 @@ static void dptc_call_alib(const char *buf_name, uint8_t *buffer, size_t size) static void acipgen_dptci(void) { - const config_t *config = config_of_soc(); + const struct soc_amd_picasso_config *config = config_of_soc(); if (!config->dptc_enable) return; -- cgit v1.2.3