From 4f9265fdc6c6609dd801a13415bc7a5378076e78 Mon Sep 17 00:00:00 2001 From: Eric Biederman Date: Fri, 22 Oct 2004 02:33:51 +0000 Subject: - kill typo so resources are not mixed up in amdk8/northbridge.c - Enable resources on the lpc bus. PCI now longer do this by default for their children unless they are bridges. git-svn-id: svn://svn.coreboot.org/coreboot/trunk@1703 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/northbridge/amd/amdk8/northbridge.c | 2 +- src/southbridge/amd/amd8111/amd8111_lpc.c | 8 +++++- src/southbridge/intel/i82801dbm/i82801dbm_lpc.c | 37 +++++++++---------------- src/southbridge/intel/i82801er/i82801er_lpc.c | 37 +++++++++---------------- 4 files changed, 34 insertions(+), 50 deletions(-) diff --git a/src/northbridge/amd/amdk8/northbridge.c b/src/northbridge/amd/amdk8/northbridge.c index d68ad11ea7..f3f6ba9818 100644 --- a/src/northbridge/amd/amdk8/northbridge.c +++ b/src/northbridge/amd/amdk8/northbridge.c @@ -590,7 +590,7 @@ static void pci_domain_set_resources(device_t dev) struct resource *tmp; tmp = mem1; mem1 = mem2; - mem2 = mem1; + mem2 = tmp; } /* Now place the memory as high up as it will go */ mem2->base = resource_max(mem2); diff --git a/src/southbridge/amd/amd8111/amd8111_lpc.c b/src/southbridge/amd/amd8111/amd8111_lpc.c index b94b19baab..50025bf2f7 100644 --- a/src/southbridge/amd/amd8111/amd8111_lpc.c +++ b/src/southbridge/amd/amd8111/amd8111_lpc.c @@ -170,6 +170,12 @@ static void amd8111_lpc_read_resources(device_t dev) res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; } +static void amd8111_lpc_enable_resoruces(device_t dev) +{ + pci_dev_enable_resources(dev); + enable_childrens_resources(dev); +} + static void lpci_set_subsystem(device_t dev, unsigned vendor, unsigned device) { @@ -182,7 +188,7 @@ static struct pci_operations lops_pci = { static struct device_operations lpc_ops = { .read_resources = amd8111_lpc_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, + .enable_resources = amd8111_lpc_enable_resources, .init = lpc_init, .scan_bus = scan_static_bus, .enable = amd8111_enable, diff --git a/src/southbridge/intel/i82801dbm/i82801dbm_lpc.c b/src/southbridge/intel/i82801dbm/i82801dbm_lpc.c index 2d272db6d8..3325a743c8 100644 --- a/src/southbridge/intel/i82801dbm/i82801dbm_lpc.c +++ b/src/southbridge/intel/i82801dbm/i82801dbm_lpc.c @@ -172,40 +172,29 @@ static void lpc_init(struct device *dev) static void i82801dbm_lpc_read_resources(device_t dev) { - unsigned int reg; + struct resource *res; /* Get the normal pci resources of this device */ pci_dev_read_resources(dev); - /* Find my place in the resource list */ - reg = dev->resources; - /* Add an extra subtractive resource for both memory and I/O */ - dev->resource[reg].base = 0; - dev->resource[reg].size = 0; - dev->resource[reg].align = 0; - dev->resource[reg].gran = 0; - dev->resource[reg].limit = 0; - dev->resource[reg].flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - dev->resource[reg].index = 0; - reg++; - - dev->resource[reg].base = 0; - dev->resource[reg].size = 0; - dev->resource[reg].align = 0; - dev->resource[reg].gran = 0; - dev->resource[reg].limit = 0; - dev->resource[reg].flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - dev->resource[reg].index = 0; - reg++; - - dev->resources = reg; + res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); + res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; + + res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); + res->flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; +} + +static void i82801dbm_lpc_enable_resources(device_t dev) +{ + pci_dev_enable_resources(dev); + enable_childrens_resources(dev); } static struct device_operations lpc_ops = { .read_resources = i82801dbm_lpc_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, + .enable_resources = i82801dbm_lpc_enable_resources, .init = lpc_init, .scan_bus = scan_static_bus, .enable = i82801dbm_enable, diff --git a/src/southbridge/intel/i82801er/i82801er_lpc.c b/src/southbridge/intel/i82801er/i82801er_lpc.c index 7a449421b0..f7928d127b 100644 --- a/src/southbridge/intel/i82801er/i82801er_lpc.c +++ b/src/southbridge/intel/i82801er/i82801er_lpc.c @@ -172,40 +172,29 @@ static void lpc_init(struct device *dev) static void i82801er_lpc_read_resources(device_t dev) { - unsigned int reg; + struct resource *res; /* Get the normal pci resources of this device */ pci_dev_read_resources(dev); - /* Find my place in the resource list */ - reg = dev->resources; - /* Add an extra subtractive resource for both memory and I/O */ - dev->resource[reg].base = 0; - dev->resource[reg].size = 0; - dev->resource[reg].align = 0; - dev->resource[reg].gran = 0; - dev->resource[reg].limit = 0; - dev->resource[reg].flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - dev->resource[reg].index = 0; - reg++; - - dev->resource[reg].base = 0; - dev->resource[reg].size = 0; - dev->resource[reg].align = 0; - dev->resource[reg].gran = 0; - dev->resource[reg].limit = 0; - dev->resource[reg].flags = IORESOURCE_MEM | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; - dev->resource[reg].index = 0; - reg++; - - dev->resources = reg; + res = new_resource(dev, IOINDEX_SUBTRACTIVE(0, 0)); + res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; + + res = new_resource(dev, IOINDEX_SUBTRACTIVE(1, 0)); + res->flags = IORESOURCE_IO | IORESOURCE_SUBTRACTIVE | IORESOURCE_ASSIGNED; +} + +static void i82801er_lpc_enable_resources(device_t dev) +{ + pci_dev_enable_resources(dev); + enable_childrens_resources(dev); } static struct device_operations lpc_ops = { .read_resources = i82801er_lpc_read_resources, .set_resources = pci_dev_set_resources, - .enable_resources = pci_dev_enable_resources, + .enable_resources = i82801er_lpc_enable_resources, .init = lpc_init, .scan_bus = scan_static_bus, .enable = i82801er_enable, -- cgit v1.2.3