From 4b8a24193512c8889c532e56df7e706c79dec447 Mon Sep 17 00:00:00 2001 From: Patrick Georgi Date: Tue, 9 Feb 2010 19:35:16 +0000 Subject: Allow building images with different prefixes (ie. normal/romstage, helloWorld/romstage, ...). It defaults to fallback/, so there's no user visible change now. Signed-off-by: Patrick Georgi Acked-by: Peter Stuge git-svn-id: svn://svn.coreboot.org/coreboot/trunk@5102 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1 --- src/Kconfig | 7 +++++++ src/arch/i386/Makefile.inc | 6 +++--- src/arch/i386/Makefile.tinybootblock.inc | 8 ++++---- src/arch/i386/init/crt0.S.lb | 7 ++----- src/boot/hardwaremain.c | 6 +----- src/cpu/amd/car/copy_and_run.c | 12 ++---------- src/cpu/amd/model_lx/cache_as_ram.inc | 7 ++----- 7 files changed, 21 insertions(+), 32 deletions(-) diff --git a/src/Kconfig b/src/Kconfig index a9d8ce1a71..675446ba6e 100644 --- a/src/Kconfig +++ b/src/Kconfig @@ -39,6 +39,13 @@ config LOCALVERSION the coreboot version number, so that you can easily distinguish boot logs of different boards from each other. +config CBFS_PREFIX + string "CBFS prefix to use" + default "fallback" + help + Select the prefix to all files put into the image. It's "fallback" + by default, "normal" is a common alternative. + endmenu source src/mainboard/Kconfig diff --git a/src/arch/i386/Makefile.inc b/src/arch/i386/Makefile.inc index b46fc8cfb5..d6b68e2524 100644 --- a/src/arch/i386/Makefile.inc +++ b/src/arch/i386/Makefile.inc @@ -15,14 +15,14 @@ $(obj)/coreboot.rom: $(obj)/coreboot.pre $(obj)/coreboot_ram $(CBFSTOOL) cp $(obj)/coreboot.pre $@ if [ -f fallback/coreboot_apc ]; \ then \ - $(CBFSTOOL) $@ add-stage fallback/coreboot_apc fallback/coreboot_apc $(CBFS_COMPRESS_FLAG); \ + $(CBFSTOOL) $@ add-stage fallback/coreboot_apc $(CONFIG_CBFS_PREFIX)/coreboot_apc $(CBFS_COMPRESS_FLAG); \ fi - $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram fallback/coreboot_ram $(CBFS_COMPRESS_FLAG) + $(CBFSTOOL) $@ add-stage $(obj)/coreboot_ram $(CONFIG_CBFS_PREFIX)/coreboot_ram $(CBFS_COMPRESS_FLAG) ifeq ($(CONFIG_PAYLOAD_NONE),y) @printf " PAYLOAD none (as specified by user)\n" else @printf " PAYLOAD $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CBFS_PAYLOAD_COMPRESS_FLAG)\n" - $(CBFSTOOL) $(obj)/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) fallback/payload $(CBFS_PAYLOAD_COMPRESS_FLAG) + $(CBFSTOOL) $(obj)/coreboot.rom add-payload $(CONFIG_FALLBACK_PAYLOAD_FILE) $(CONFIG_CBFS_PREFIX)/payload $(CBFS_PAYLOAD_COMPRESS_FLAG) endif ifeq ($(CONFIG_VGA_BIOS),y) @printf " VGABIOS $(CONFIG_FALLBACK_VGA_BIOS_FILE) $(CONFIG_FALLBACK_VGA_BIOS_ID)\n" diff --git a/src/arch/i386/Makefile.tinybootblock.inc b/src/arch/i386/Makefile.tinybootblock.inc index e30e89d3c6..e570a290d3 100644 --- a/src/arch/i386/Makefile.tinybootblock.inc +++ b/src/arch/i386/Makefile.tinybootblock.inc @@ -10,7 +10,7 @@ $(obj)/coreboot.pre1: $(obj)/coreboot.bootblock $(CBFSTOOL) $(obj)/coreboot.pre: $(obj)/coreboot.romstage $(obj)/coreboot.pre1 $(CBFSTOOL) rm -f $@ cp $(obj)/coreboot.pre1 $@ - $(CBFSTOOL) $@ add-stage $(obj)/romstage.elf fallback/romstage x 0x$(shell cat $(obj)/location.txt) + $(CBFSTOOL) $@ add-stage $(obj)/romstage.elf $(CONFIG_CBFS_PREFIX)/romstage x 0x$(shell cat $(obj)/location.txt) #FIXME: location.txt might require an offset of header size ####################################################################### @@ -58,8 +58,8 @@ $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o: $(obj)/mainboard/$(MAINBOARDDIR)/b $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.s: $(obj)/bootblock/bootblock.c $(CC) -x assembler-with-cpp -DASSEMBLY -E -I$(src)/include -I$(src)/arch/i386/include -I$(obj) -I$(obj)/bootblock -include $(obj)/config.h -I. -I$(src) $< > $@.new && mv $@.new $@ -$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(obj)/romcc $(src)/arch/i386/init/bootblock.c - $(obj)/romcc $(bootblock_romccflags) -O2 $(ROMCCFLAGS) $(INCLUDES) $(src)/arch/i386/init/bootblock.c -o $@ +$(obj)/mainboard/$(MAINBOARDDIR)/bootblock.inc: $(src)/arch/i386/init/$(subst ",,$(CONFIG_TINY_BOOTBLOCK_SOURCE)) $(obj)/romcc + $(obj)/romcc $(bootblock_romccflags) -O2 $(ROMCCFLAGS) $(INCLUDES) $< -o $@ $(obj)/bootblock.elf: $(obj)/mainboard/$(MAINBOARDDIR)/bootblock.o $(obj)/bootblock/ldscript.ld @printf " LINK $(subst $(obj)/,,$(@))\n" @@ -74,7 +74,7 @@ $(obj)/coreboot.romstage: $(obj)/coreboot.pre1 $(initobjs) $(obj)/romstage/ldscr $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(initobjs) $(OBJCOPY) -O binary $(obj)/romstage.elf $(obj)/romstage.bin printf "CONFIG_ROMBASE = 0x" > $(obj)/location.ld - $(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin fallback/romstage $(CONFIG_XIP_ROM_SIZE) > $(obj)/location.txt + $(CBFSTOOL) $(obj)/coreboot.pre1 locate $(obj)/romstage.bin $(CONFIG_CBFS_PREFIX)/romstage $(CONFIG_XIP_ROM_SIZE) > $(obj)/location.txt cat $(obj)/location.txt >> $(obj)/location.ld printf ';\nAUTO_XIP_ROM_BASE = CONFIG_ROMBASE & ~(CONFIG_XIP_ROM_SIZE - 1);\n' >> $(obj)/location.ld $(CC) -nostdlib -nostartfiles -static -o $(obj)/romstage.elf -L$(obj) -T $(obj)/romstage/ldscript.ld $(initobjs) diff --git a/src/arch/i386/init/crt0.S.lb b/src/arch/i386/init/crt0.S.lb index 95764ae596..c4206bf007 100644 --- a/src/arch/i386/init/crt0.S.lb +++ b/src/arch/i386/init/crt0.S.lb @@ -137,10 +137,7 @@ str_pre_main: .string "Jumping to coreboot.\r\n" #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ -#if CONFIG_USE_FALLBACK_IMAGE == 1 -str_coreboot_ram_name: .string "fallback/coreboot_ram" -#else -str_coreboot_ram_name: .string "normal/coreboot_ram" -#endif +str_coreboot_ram_name: .ascii CONFIG_CBFS_PREFIX + .string "/coreboot_ram" #endif /* CONFIG_USE_DCACHE_RAM */ diff --git a/src/boot/hardwaremain.c b/src/boot/hardwaremain.c index f56069effd..071e056892 100644 --- a/src/boot/hardwaremain.c +++ b/src/boot/hardwaremain.c @@ -103,11 +103,7 @@ void hardwaremain(int boot_complete) * write our configuration tables. */ lb_mem = write_tables(); -#if CONFIG_USE_FALLBACK_IMAGE == 1 - cbfs_load_payload(lb_mem, "fallback/payload"); -#else - cbfs_load_payload(lb_mem, "normal/payload"); -#endif + cbfs_load_payload(lb_mem, CONFIG_CBFS_PREFIX "/payload"); printk(BIOS_ERR, "Boot failed.\n"); } diff --git a/src/cpu/amd/car/copy_and_run.c b/src/cpu/amd/car/copy_and_run.c index a391ec59b4..f8ccf17513 100644 --- a/src/cpu/amd/car/copy_and_run.c +++ b/src/cpu/amd/car/copy_and_run.c @@ -7,21 +7,13 @@ void cbfs_and_run_core(const char*, unsigned ebp); static void copy_and_run(void) { -#if CONFIG_USE_FALLBACK_IMAGE == 1 - cbfs_and_run_core("fallback/coreboot_ram", 0); -#else - cbfs_and_run_core("normal/coreboot_ram", 0); -#endif + cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_ram", 0); } #if CONFIG_AP_CODE_IN_CAR == 1 static void copy_and_run_ap_code_in_car(unsigned ret_addr) { -# if CONFIG_USE_FALLBACK_IMAGE == 1 - cbfs_and_run_core("fallback/coreboot_apc", ret_addr); -# else - cbfs_and_run_core("normal/coreboot_apc", ret_addr); -# endif + cbfs_and_run_core(CONFIG_CBFS_PREFIX "/coreboot_apc", ret_addr); } #endif diff --git a/src/cpu/amd/model_lx/cache_as_ram.inc b/src/cpu/amd/model_lx/cache_as_ram.inc index 1abfd8168a..659e0141a8 100644 --- a/src/cpu/amd/model_lx/cache_as_ram.inc +++ b/src/cpu/amd/model_lx/cache_as_ram.inc @@ -278,8 +278,5 @@ str_pre_main: .string "Jumping to coreboot.\r\n" .previous #endif /* ASM_CONSOLE_LOGLEVEL > BIOS_DEBUG */ -#if CONFIG_USE_FALLBACK_IMAGE == 1 -str_coreboot_ram_name: .string "fallback/coreboot_ram" -#else -str_coreboot_ram_name: .string "normal/coreboot_ram" -#endif +str_coreboot_ram_name: .ascii CONFIG_CBFS_PREFIX + .string "/coreboot_ram" -- cgit v1.2.3