From 4af2342673befb65b19363c9265a0887ff001eec Mon Sep 17 00:00:00 2001 From: Marshall Dawson Date: Mon, 25 Sep 2017 11:55:28 -0600 Subject: google/kahlee: Move DRAM clear override to devicetree Kahlee needs to keep its DRAM contents after a reset. Move this override out of the OemCustomize.c file to a devicetree register setting. Change-Id: I3196cb8b94bec64e8ce59e4285cf8d97f442bd3d Signed-off-by: Marshall Dawson Signed-off-by: Richard Spiegel Reviewed-on: https://review.coreboot.org/21858 Reviewed-by: Aaron Durbin Tested-by: build bot (Jenkins) --- src/mainboard/google/kahlee/OemCustomize.c | 2 -- src/mainboard/google/kahlee/variants/kahlee/devicetree.cb | 1 + 2 files changed, 1 insertion(+), 2 deletions(-) diff --git a/src/mainboard/google/kahlee/OemCustomize.c b/src/mainboard/google/kahlee/OemCustomize.c index bbb51e49dc..36bb419d41 100644 --- a/src/mainboard/google/kahlee/OemCustomize.c +++ b/src/mainboard/google/kahlee/OemCustomize.c @@ -35,6 +35,4 @@ void OemPostParams(AMD_POST_PARAMS *PostParams) { PostParams->MemConfig.PlatformMemoryConfiguration = (PSO_ENTRY *)DDR4PlatformMemoryConfiguration; - /* disable memory clear for pstore memory storage and boot time */ - PostParams->MemConfig.EnableMemClr = FALSE; } diff --git a/src/mainboard/google/kahlee/variants/kahlee/devicetree.cb b/src/mainboard/google/kahlee/variants/kahlee/devicetree.cb index 4376011797..c4535225e2 100644 --- a/src/mainboard/google/kahlee/variants/kahlee/devicetree.cb +++ b/src/mainboard/google/kahlee/variants/kahlee/devicetree.cb @@ -18,6 +18,7 @@ chip soc/amd/stoneyridge { { {0xA0, 0x00} }, // socket 0 - Channel 0, slot 0 }" + register "dram_clear_on_reset" = "DRAM_CONTENTS_KEEP" device cpu_cluster 0 on device lapic 10 on end -- cgit v1.2.3