From 497ff3ce7ce91d0d58ea60f58ad70422cb0ff2b8 Mon Sep 17 00:00:00 2001 From: Barnali Sarkar Date: Fri, 18 Dec 2015 16:29:59 +0530 Subject: google/chell: Enable FspSkipMpInit token MP init is already handled in coreboot, but it is also part of FSP FSP has a implemented a provision to allow FSP to skip MP init and let coreboot handle it. BRANCH=none BUG=chrome-os-partner:44805 TEST=none CQ-DEPEND=CL:319353 Change-Id: I22c1add182b299e2ad9d413bc13c5a5acc6a3179 Signed-off-by: Patrick Georgi Original-Commit-Id: ccf89c9d1fe18b74c385e7d12a6aef5b63d7b243 Original-Change-Id: I53b754fd10a140588ad67d9292d9bc04a6d43677 Original-Signed-off-by: Barnali Sarkar Original-Reviewed-on: https://chromium-review.googlesource.com/319194 Original-Reviewed-by: Aaron Durbin Reviewed-on: https://review.coreboot.org/13000 Tested-by: build bot (Jenkins) Reviewed-by: Martin Roth --- src/mainboard/google/chell/devicetree.cb | 1 + 1 file changed, 1 insertion(+) diff --git a/src/mainboard/google/chell/devicetree.cb b/src/mainboard/google/chell/devicetree.cb index f43d6c8383..81df06f083 100644 --- a/src/mainboard/google/chell/devicetree.cb +++ b/src/mainboard/google/chell/devicetree.cb @@ -43,6 +43,7 @@ chip soc/intel/skylake register "SkipExtGfxScan" = "1" register "Device4Enable" = "1" register "HeciEnabled" = "0" + register "FspSkipMpInit" = "1" # VR Settings Configuration for 5 Domains #+----------------+-------+-------+-------------+-------------+-------+ -- cgit v1.2.3