From 48d6b76d53a43c6924ed27303651aed5c6c6f34c Mon Sep 17 00:00:00 2001
From: Arthur Heymans <arthur@aheymans.xyz>
Date: Tue, 13 Jun 2017 14:12:38 +0200
Subject: src/soc/intel/common: Don't allow user to change PCIe BAR
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Change-Id: I254549057552be93611afa8ca52d22be220fe3dc
Signed-off-by: Arthur Heymans <arthur@aheymans.xyz>
Reviewed-on: https://review.coreboot.org/20178
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Aaron Durbin <adurbin@chromium.org>
Reviewed-by: Philippe Mathieu-Daudé <philippe.mathieu.daude@gmail.com>
Reviewed-by: Sumeet R Pawnikar <sumeet.r.pawnikar@intel.com>
---
 src/soc/intel/common/block/systemagent/Kconfig | 2 +-
 1 file changed, 1 insertion(+), 1 deletion(-)

diff --git a/src/soc/intel/common/block/systemagent/Kconfig b/src/soc/intel/common/block/systemagent/Kconfig
index 01a4f8e201..2084a38692 100644
--- a/src/soc/intel/common/block/systemagent/Kconfig
+++ b/src/soc/intel/common/block/systemagent/Kconfig
@@ -4,7 +4,7 @@ config SOC_INTEL_COMMON_BLOCK_SA
 	  Intel Processor common System Agent support
 
 config MMCONF_BASE_ADDRESS
-	hex "PCI MMIO Base Address"
+	hex
 	default 0xe0000000
 
 config SA_PCIEX_LENGTH
-- 
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