From 4788effb045ae1f71d89c78a0b16a93d5ba79e89 Mon Sep 17 00:00:00 2001
From: "Ronald G. Minnich" <rminnich@gmail.com>
Date: Fri, 21 Jul 2006 23:21:01 +0000
Subject: restore the old code for enabling flash. The new amd code did not
work.
git-svn-id: svn://svn.coreboot.org/coreboot/trunk@2346 2b7e53f0-3cfb-0310-b3e9-8179ed1497e1
---
src/northbridge/amd/gx2/chipsetinit.c | 2 +-
src/southbridge/amd/cs5536/cs5536.c | 4 +++-
2 files changed, 4 insertions(+), 2 deletions(-)
diff --git a/src/northbridge/amd/gx2/chipsetinit.c b/src/northbridge/amd/gx2/chipsetinit.c
index 3bd73f7c9c..4bc6be5295 100644
--- a/src/northbridge/amd/gx2/chipsetinit.c
+++ b/src/northbridge/amd/gx2/chipsetinit.c
@@ -358,7 +358,7 @@ chipsetinit (struct northbridge_amd_gx2_config *nb){
/* Flash Setup*/
- printk_err("%sDOING ChipsetFlashSetup()!!!!!!!!!!!!!!!!!!\n", nb->setupflash? "NOT " : "");
+ printk_err("%sDOING ChipsetFlashSetup()!!!!!!!!!!!!!!!!!!\n", nb->setupflash? " " : "NOT");
if (nb->setupflash)
ChipsetFlashSetup();
diff --git a/src/southbridge/amd/cs5536/cs5536.c b/src/southbridge/amd/cs5536/cs5536.c
index 9dcffd6fbc..6ab87fdbf9 100644
--- a/src/southbridge/amd/cs5536/cs5536.c
+++ b/src/southbridge/amd/cs5536/cs5536.c
@@ -14,13 +14,15 @@
/* Intended value for LBAR_FLSH0: 4KiB, enabled, MMIO, NAND, @0x20000000 */
/* NOTE: no longer used, prune at some point */
+/* OOPS: steve's changes don't work, so we have to keep this */
msr_t flsh0 = { .hi=0xFFFFF007, .lo=0x20000000};
static void
enable_ide_nand_flash(){
msr_t msr;
printk_err("cs5536: %s\n", __FUNCTION__);
-#if 0
+#if 1
+ printk_err("WARNING: using deprecated flash enable mechanism\n");
/* steve took this one out ... not sure if needed or not */
msr = rdmsr(MDD_LBAR_FLSH0);
--
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