From 458708fc30c8ba606d2b3126a3ac15fe68be01b0 Mon Sep 17 00:00:00 2001 From: V Sowmya Date: Fri, 9 Jul 2021 22:11:04 +0530 Subject: soc/intel/alderlake: Update the VccIn Aux Imon IccMax for ADL This patch updates the VccIn Aux Imon IccMax for ADL-P to SOC SKU specific values from the FSP default value 160. * ADL-P 682(45W) = 137. * ADL-P 482(28W) = 128. * ADL-P 282(15W) = 128. These config values are generated iPDG application with ADL-P platform package tool and supports 15W/28W/45W SKU's. RDC Kit ID for the iPDG tools, * Intel(R) Platform Design Studio Installer: 610905. * Intel(R) Platform Design Studio - Platform ADL-P (Partial): 627345. * Intel(R) Platform Design Studio - Platform ADL-P (Full): 630261. BUG=b:195033556 Signed-off-by: V Sowmya Change-Id: I6c159035cba781d3661a0a0cef16f9591a583912 Reviewed-on: https://review.coreboot.org/c/coreboot/+/56176 Reviewed-by: Tim Wawrzynczak Tested-by: build bot (Jenkins) --- src/soc/intel/alderlake/fsp_params.c | 34 ++++++++++++++++++++++++++++++++++ 1 file changed, 34 insertions(+) diff --git a/src/soc/intel/alderlake/fsp_params.c b/src/soc/intel/alderlake/fsp_params.c index f6a88ec281..3d08573d2c 100644 --- a/src/soc/intel/alderlake/fsp_params.c +++ b/src/soc/intel/alderlake/fsp_params.c @@ -5,6 +5,7 @@ #include #include #include +#include #include #include #include @@ -33,6 +34,12 @@ #define DEF_DMVAL 15 #define DEF_DITOVAL 625 +/* VccIn Aux Imon IccMax values in mA */ +#define MILLIAMPS_TO_AMPS 1000 +#define ICC_MAX_ID_ADL_P_3_MA 34250 +#define ICC_MAX_ID_ADL_P_5_MA 32000 +#define ICC_MAX_ID_ADL_P_7_MA 32000 + /* * ME End of Post configuration * 0 - Disable EOP. @@ -280,6 +287,30 @@ static int get_l1_substate_control(enum L1_substates_control ctl) return ctl - 1; } +/* This function returns the VccIn Aux Imon IccMax values for ADL-P SKU's */ +static uint16_t get_vccin_aux_imon_iccmax(void) +{ + uint16_t mch_id = 0; + + if (!mch_id) { + struct device *dev = pcidev_path_on_root(SA_DEVFN_ROOT); + mch_id = dev ? pci_read_config16(dev, PCI_DEVICE_ID) : 0xffff; + } + + switch (mch_id) { + case PCI_DEVICE_ID_INTEL_ADL_P_ID_3: + return ICC_MAX_ID_ADL_P_3_MA; + case PCI_DEVICE_ID_INTEL_ADL_P_ID_5: + return ICC_MAX_ID_ADL_P_5_MA; + case PCI_DEVICE_ID_INTEL_ADL_P_ID_7: + return ICC_MAX_ID_ADL_P_7_MA; + default: + printk(BIOS_ERR, "Unknown MCH ID: 0x%4x, skipping VccInAuxImonIccMax config\n", + mch_id); + return 0; + } +} + __weak void mainboard_update_soc_chip_config(struct soc_intel_alderlake_config *config) { /* Override settings per board. */ @@ -581,6 +612,9 @@ static void fill_fsps_misc_power_params(FSP_S_CONFIG *s_cfg, /* Enable the energy efficient turbo mode */ s_cfg->EnergyEfficientTurbo = 1; s_cfg->PkgCStateLimit = LIMIT_AUTO; + + /* VccIn Aux Imon IccMax. Values are in 1/4 Amp increments and range is 0-512. */ + s_cfg->VccInAuxImonIccImax = get_vccin_aux_imon_iccmax() * 4 / MILLIAMPS_TO_AMPS; } static void fill_fsps_irq_params(FSP_S_CONFIG *s_cfg, -- cgit v1.2.3