From 3b3512941b557e1b8c0eb1922fa762f225848344 Mon Sep 17 00:00:00 2001 From: Paul Menzel Date: Sun, 10 May 2020 22:00:42 +0200 Subject: Documentation/getting_started: Fix typo Change-Id: I41571c45719dfade49a021b6bafe80afdcb7b581 Signed-off-by: Paul Menzel Reviewed-on: https://review.coreboot.org/c/coreboot/+/41223 Tested-by: build bot (Jenkins) Reviewed-by: Felix Held --- Documentation/getting_started/architecture.md | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/Documentation/getting_started/architecture.md b/Documentation/getting_started/architecture.md index d037f752d9..8d63ac2c75 100644 --- a/Documentation/getting_started/architecture.md +++ b/Documentation/getting_started/architecture.md @@ -10,7 +10,7 @@ coreboot consists of multiple stages that are compiled as separate binaries and are inserted into the CBFS with custom compression. The bootblock usually doesn't have compression while the ramstage and payload are compressed with LZMA. -Each stage loads the next stage a given address (possibly decompressing it). +Each stage loads the next stage at given address (possibly decompressing it). Some stages are relocatable and can be placed anywhere in DRAM. Those stages are usually cached in CBMEM for faster loading times on ACPI S3 resume. -- cgit v1.2.3