From 39fda6d9159461f04f74259919281baca7cb4393 Mon Sep 17 00:00:00 2001 From: Gabe Black Date: Sat, 18 May 2013 23:06:47 -0700 Subject: exynos5250: Clear the framebuffer before making it uncacheable. If we clear the framebuffer and then flush it back to memory using cache operations, the writes are going to be full cachelines at a time. If we make it uncacheable first, the writes will be serialized writes of whatever sized chunks memset uses, probably 4 bytes or less. Change-Id: I1b81731cfed00ae091ba6357451ab186d16f559e Signed-off-by: Gabe Black Reviewed-on: http://review.coreboot.org/3655 Tested-by: build bot (Jenkins) Reviewed-by: Stefan Reinauer --- src/cpu/samsung/exynos5250/cpu.c | 3 ++- 1 file changed, 2 insertions(+), 1 deletion(-) diff --git a/src/cpu/samsung/exynos5250/cpu.c b/src/cpu/samsung/exynos5250/cpu.c index d2a6df7fc4..3687ea859b 100644 --- a/src/cpu/samsung/exynos5250/cpu.c +++ b/src/cpu/samsung/exynos5250/cpu.c @@ -97,6 +97,8 @@ static void exynos_displayport_init(device_t dev) lcdbase = (uintptr_t)cbmem_add(CBMEM_ID_CONSOLE, fb_size); printk(BIOS_SPEW, "LCD framebuffer base is %p\n", (void *)(lcdbase)); + memset((void *)lcdbase, 0, fb_size); /* clear the framebuffer */ + /* * We need to clean and invalidate the framebuffer region and disable * caching as well. We assume that our dcache <--> memory address @@ -114,7 +116,6 @@ static void exynos_displayport_init(device_t dev) mmio_resource(dev, 1, lcdbase/KiB, (fb_size + KiB - 1)/KiB); printk(BIOS_DEBUG, "Initializing Exynos VGA, base %p\n", (void *)lcdbase); - memset((void *)lcdbase, 0, fb_size); /* clear the framebuffer */ ret = lcd_ctrl_init(fb_size, &panel, (void *)lcdbase); } -- cgit v1.2.3