From 379aab47f9bf4a804de168b61d3b2a1f6f789a91 Mon Sep 17 00:00:00 2001
From: Elyes HAOUAS <ehaouas@noos.fr>
Date: Wed, 27 May 2020 16:21:55 +0200
Subject: src: Remove unused 'include <cpu/x86/mtrr.h>'

Change-Id: I3f08b9cc34582165785063580b3356135030f63e
Signed-off-by: Elyes HAOUAS <ehaouas@noos.fr>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/41782
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Angel Pons <th3fanbus@gmail.com>
Reviewed-by: David Guckian
---
 src/cpu/intel/car/romstage.c                          | 1 -
 src/cpu/intel/haswell/bootblock.c                     | 1 -
 src/cpu/x86/lapic/secondary.S                         | 1 -
 src/drivers/intel/fsp1_1/romstage.c                   | 1 -
 src/drivers/intel/gma/intel_ddi.c                     | 1 -
 src/northbridge/intel/e7505/raminit.c                 | 1 -
 src/northbridge/intel/x4x/raminit.c                   | 1 -
 src/soc/intel/broadwell/bootblock/cpu.c               | 1 -
 src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S | 1 -
 src/soc/intel/common/block/cpu/car/exit_car_fsp.S     | 1 -
 src/soc/intel/common/block/cpu/cpulib.c               | 1 -
 src/soc/intel/denverton_ns/bootblock/bootblock.c      | 1 -
 src/soc/intel/denverton_ns/romstage.c                 | 1 -
 src/soc/intel/quark/include/soc/reg_access.h          | 1 -
 src/soc/intel/xeon_sp/skx/romstage.c                  | 1 -
 15 files changed, 15 deletions(-)

diff --git a/src/cpu/intel/car/romstage.c b/src/cpu/intel/car/romstage.c
index 233e106097..a955d8c3c7 100644
--- a/src/cpu/intel/car/romstage.c
+++ b/src/cpu/intel/car/romstage.c
@@ -4,7 +4,6 @@
 #include <arch/romstage.h>
 #include <bootblock_common.h>
 #include <console/console.h>
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/smm.h>
 #include <arch/symbols.h>
 #include <commonlib/helpers.h>
diff --git a/src/cpu/intel/haswell/bootblock.c b/src/cpu/intel/haswell/bootblock.c
index 2fe9400f7c..c9e3f2abad 100644
--- a/src/cpu/intel/haswell/bootblock.c
+++ b/src/cpu/intel/haswell/bootblock.c
@@ -3,7 +3,6 @@
 #include <stdint.h>
 #include <arch/bootblock.h>
 #include <cpu/x86/msr.h>
-#include <cpu/x86/mtrr.h>
 #include <arch/io.h>
 #include <halt.h>
 
diff --git a/src/cpu/x86/lapic/secondary.S b/src/cpu/x86/lapic/secondary.S
index 6aa0c59aa8..8a44112943 100644
--- a/src/cpu/x86/lapic/secondary.S
+++ b/src/cpu/x86/lapic/secondary.S
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/lapic_def.h>
 #include <arch/ram_segs.h>
 
diff --git a/src/drivers/intel/fsp1_1/romstage.c b/src/drivers/intel/fsp1_1/romstage.c
index 51c4340c5a..46df1c8697 100644
--- a/src/drivers/intel/fsp1_1/romstage.c
+++ b/src/drivers/intel/fsp1_1/romstage.c
@@ -7,7 +7,6 @@
 #include <cbmem.h>
 #include <cf9_reset.h>
 #include <cpu/intel/microcode.h>
-#include <cpu/x86/mtrr.h>
 #include <ec/google/chromeec/ec.h>
 #include <ec/google/chromeec/ec_commands.h>
 #include <elog.h>
diff --git a/src/drivers/intel/gma/intel_ddi.c b/src/drivers/intel/gma/intel_ddi.c
index 87b768c783..a04789b5f0 100644
--- a/src/drivers/intel/gma/intel_ddi.c
+++ b/src/drivers/intel/gma/intel_ddi.c
@@ -8,7 +8,6 @@
 #include <device/pci.h>
 #include <ec/google/chromeec/ec.h>
 #include <cpu/x86/tsc.h>
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
 #include <edid.h>
 #include <drivers/intel/gma/i915.h>
diff --git a/src/northbridge/intel/e7505/raminit.c b/src/northbridge/intel/e7505/raminit.c
index 65db922b5e..b87ba6e122 100644
--- a/src/northbridge/intel/e7505/raminit.c
+++ b/src/northbridge/intel/e7505/raminit.c
@@ -19,7 +19,6 @@
 #include <lib.h>
 #include <commonlib/helpers.h>
 #include <console/console.h>
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/msr.h>
 #include <assert.h>
 #include <spd.h>
diff --git a/src/northbridge/intel/x4x/raminit.c b/src/northbridge/intel/x4x/raminit.c
index 330ce9ee71..e505a5bcdd 100644
--- a/src/northbridge/intel/x4x/raminit.c
+++ b/src/northbridge/intel/x4x/raminit.c
@@ -4,7 +4,6 @@
 #include <cbmem.h>
 #include <cf9_reset.h>
 #include <console/console.h>
-#include <cpu/x86/mtrr.h>
 #include <arch/cpu.h>
 #if CONFIG(SOUTHBRIDGE_INTEL_I82801GX)
 #include <southbridge/intel/i82801gx/i82801gx.h> /* smbus_read_byte */
diff --git a/src/soc/intel/broadwell/bootblock/cpu.c b/src/soc/intel/broadwell/bootblock/cpu.c
index 79f859bec3..d6883c6436 100644
--- a/src/soc/intel/broadwell/bootblock/cpu.c
+++ b/src/soc/intel/broadwell/bootblock/cpu.c
@@ -4,7 +4,6 @@
 #include <arch/bootblock.h>
 #include <arch/io.h>
 #include <cpu/x86/msr.h>
-#include <cpu/x86/mtrr.h>
 #include <halt.h>
 #include <soc/rcba.h>
 #include <soc/msr.h>
diff --git a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
index 393d612d3c..b9daf08b2f 100644
--- a/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
+++ b/src/soc/intel/common/block/cpu/car/cache_as_ram_fsp.S
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <device/pci_def.h>
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/cr.h>
 #include <cpu/x86/post_code.h>
 
diff --git a/src/soc/intel/common/block/cpu/car/exit_car_fsp.S b/src/soc/intel/common/block/cpu/car/exit_car_fsp.S
index e5798fb6cc..fd79e8eb4e 100644
--- a/src/soc/intel/common/block/cpu/car/exit_car_fsp.S
+++ b/src/soc/intel/common/block/cpu/car/exit_car_fsp.S
@@ -1,6 +1,5 @@
 /* SPDX-License-Identifier: GPL-2.0-only */
 
-#include <cpu/x86/mtrr.h>
 #include <cpu/x86/cr.h>
 
 /*
diff --git a/src/soc/intel/common/block/cpu/cpulib.c b/src/soc/intel/common/block/cpu/cpulib.c
index 7201432301..dac654fea6 100644
--- a/src/soc/intel/common/block/cpu/cpulib.c
+++ b/src/soc/intel/common/block/cpu/cpulib.c
@@ -4,7 +4,6 @@
 #include <console/console.h>
 #include <cpu/intel/turbo.h>
 #include <cpu/x86/msr.h>
-#include <cpu/x86/mtrr.h>
 #include <arch/cpu.h>
 #include <intelblocks/cpulib.h>
 #include <intelblocks/fast_spi.h>
diff --git a/src/soc/intel/denverton_ns/bootblock/bootblock.c b/src/soc/intel/denverton_ns/bootblock/bootblock.c
index cabcdedc93..76db62e3fd 100644
--- a/src/soc/intel/denverton_ns/bootblock/bootblock.c
+++ b/src/soc/intel/denverton_ns/bootblock/bootblock.c
@@ -1,7 +1,6 @@
 /* SPDX-License-Identifier: GPL-2.0-or-later */
 
 #include <bootblock_common.h>
-#include <cpu/x86/mtrr.h>
 #include <device/pci.h>
 #include <FsptUpd.h>
 #include <intelblocks/fast_spi.h>
diff --git a/src/soc/intel/denverton_ns/romstage.c b/src/soc/intel/denverton_ns/romstage.c
index abfd3dee10..713fb1e3ac 100644
--- a/src/soc/intel/denverton_ns/romstage.c
+++ b/src/soc/intel/denverton_ns/romstage.c
@@ -5,7 +5,6 @@
 #include <cbmem.h>
 #include <cf9_reset.h>
 #include <console/console.h>
-#include <cpu/x86/mtrr.h>
 #include <device/pci_ops.h>
 #include <soc/fiamux.h>
 #include <device/mmio.h>
diff --git a/src/soc/intel/quark/include/soc/reg_access.h b/src/soc/intel/quark/include/soc/reg_access.h
index 9693b725fb..31df09d7c5 100644
--- a/src/soc/intel/quark/include/soc/reg_access.h
+++ b/src/soc/intel/quark/include/soc/reg_access.h
@@ -5,7 +5,6 @@
 
 #include <cpu/x86/cr.h>
 #include <cpu/x86/msr.h>
-#include <cpu/x86/mtrr.h>
 #include <fsp/util.h>
 #include <reg_script.h>
 #include <soc/IntelQNCConfig.h>
diff --git a/src/soc/intel/xeon_sp/skx/romstage.c b/src/soc/intel/xeon_sp/skx/romstage.c
index 18dc81438c..c4c473b4e6 100644
--- a/src/soc/intel/xeon_sp/skx/romstage.c
+++ b/src/soc/intel/xeon_sp/skx/romstage.c
@@ -3,7 +3,6 @@
 #include <arch/romstage.h>
 #include <cbmem.h>
 #include <console/console.h>
-#include <cpu/x86/mtrr.h>
 #include <intelblocks/rtc.h>
 #include <soc/romstage.h>
 #include <soc/soc_util.h>
-- 
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