From 34cf5619f929775efd819468ba6036e637cfbd85 Mon Sep 17 00:00:00 2001 From: =?UTF-8?q?Ky=C3=B6sti=20M=C3=A4lkki?= Date: Mon, 11 Mar 2019 20:34:26 +0200 Subject: device/pci_ops: Reuse romstage PCI config for ramstage MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit By changing the signatures we do not need to define PCI config accessors separately for ramstage. Change-Id: I9364cb34fe8127972c772516a0a0b1d281c5ed00 Signed-off-by: Kyösti Mälkki Reviewed-on: https://review.coreboot.org/c/coreboot/+/31685 Tested-by: build bot (Jenkins) Reviewed-by: Nico Huber --- src/arch/x86/pci_ops_conf1.c | 64 ++++++------------------------------------- src/device/pci_ops_mmconf.c | 52 +++++------------------------------ src/include/device/pci.h | 15 ++++++---- src/include/device/pci_ops.h | 32 +++++++++++++--------- src/include/device/pci_type.h | 11 ++++++++ 5 files changed, 54 insertions(+), 120 deletions(-) diff --git a/src/arch/x86/pci_ops_conf1.c b/src/arch/x86/pci_ops_conf1.c index 4e2f24e3dd..03c2b64183 100644 --- a/src/arch/x86/pci_ops_conf1.c +++ b/src/arch/x86/pci_ops_conf1.c @@ -14,65 +14,17 @@ #include #include #include +#include + /* * Functions for accessing PCI configuration space with type 1 accesses */ -#if !CONFIG(PCI_IO_CFG_EXT) -#define CONF_CMD(dev, reg) (0x80000000 | ((dev)->bus->secondary << 16) | \ - ((dev)->path.pci.devfn << 8) | (reg & ~3)) -#else -#define CONF_CMD(dev, reg) (0x80000000 | ((dev)->bus->secondary << 16) | \ - ((dev)->path.pci.devfn << 8) | ((reg & 0xff) & ~3) |\ - ((reg & 0xf00)<<16)) -#endif - -static uint8_t pci_conf1_read_config8(const struct device *dev, uint16_t reg) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - return inb(0xCFC + (reg & 3)); -} - -static uint16_t pci_conf1_read_config16(const struct device *dev, uint16_t reg) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - return inw(0xCFC + (reg & 2)); -} - -static uint32_t pci_conf1_read_config32(const struct device *dev, uint16_t reg) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - return inl(0xCFC); -} - -static void pci_conf1_write_config8(const struct device *dev, uint16_t reg, - uint8_t value) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - outb(value, 0xCFC + (reg & 3)); -} - -static void pci_conf1_write_config16(const struct device *dev, uint16_t reg, - uint16_t value) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - outw(value, 0xCFC + (reg & 2)); -} - -static void pci_conf1_write_config32(const struct device *dev, uint16_t reg, - uint32_t value) -{ - outl(CONF_CMD(dev, reg), 0xCF8); - outl(value, 0xCFC); -} - -#undef CONF_CMD - const struct pci_bus_operations pci_cf8_conf1 = { - .read8 = pci_conf1_read_config8, - .read16 = pci_conf1_read_config16, - .read32 = pci_conf1_read_config32, - .write8 = pci_conf1_write_config8, - .write16 = pci_conf1_write_config16, - .write32 = pci_conf1_write_config32, + .read8 = pci_io_read_config8, + .read16 = pci_io_read_config16, + .read32 = pci_io_read_config32, + .write8 = pci_io_write_config8, + .write16 = pci_io_write_config16, + .write32 = pci_io_write_config32, }; diff --git a/src/device/pci_ops_mmconf.c b/src/device/pci_ops_mmconf.c index c7c005caa5..2fcb96174f 100644 --- a/src/device/pci_ops_mmconf.c +++ b/src/device/pci_ops_mmconf.c @@ -14,6 +14,7 @@ #include #include #include +#include #if (CONFIG_MMCONF_BASE_ADDRESS == 0) #error "CONFIG_MMCONF_BASE_ADDRESS needs to be non-zero!" @@ -23,52 +24,13 @@ * Functions for accessing PCI configuration space with mmconf accesses */ -#define PCI_MMIO_ADDR(dev, reg, mask) \ - ((void *)(((uintptr_t)CONFIG_MMCONF_BASE_ADDRESS |\ - (((dev)->bus->secondary & 0xFFF) << 20) |\ - (((dev)->path.pci.devfn & 0xFF) << 12) |\ - ((reg) & 0xFFF)) & ~mask)) - -static uint8_t pci_mmconf_read_config8(const struct device *dev, uint16_t reg) -{ - return read8(PCI_MMIO_ADDR(dev, reg, 0)); -} - -static uint16_t pci_mmconf_read_config16(const struct device *dev, uint16_t reg) -{ - return read16(PCI_MMIO_ADDR(dev, reg, 1)); -} - -static uint32_t pci_mmconf_read_config32(const struct device *dev, uint16_t reg) -{ - return read32(PCI_MMIO_ADDR(dev, reg, 3)); -} - -static void pci_mmconf_write_config8(const struct device *dev, uint16_t reg, - uint8_t value) -{ - write8(PCI_MMIO_ADDR(dev, reg, 0), value); -} - -static void pci_mmconf_write_config16(const struct device *dev, uint16_t reg, - uint16_t value) -{ - write16(PCI_MMIO_ADDR(dev, reg, 1), value); -} - -static void pci_mmconf_write_config32(const struct device *dev, uint16_t reg, - uint32_t value) -{ - write32(PCI_MMIO_ADDR(dev, reg, 3), value); -} - static const struct pci_bus_operations pci_ops_mmconf = { - .read8 = pci_mmconf_read_config8, - .read16 = pci_mmconf_read_config16, - .read32 = pci_mmconf_read_config32, - .write8 = pci_mmconf_write_config8, - .write16 = pci_mmconf_write_config16, - .write32 = pci_mmconf_write_config32, + .read8 = pci_mmio_read_config8, + .read16 = pci_mmio_read_config16, + .read32 = pci_mmio_read_config32, + .write8 = pci_mmio_write_config8, + .write16 = pci_mmio_write_config16, + .write32 = pci_mmio_write_config32, }; const struct pci_bus_operations *pci_bus_default_ops(void) diff --git a/src/include/device/pci.h b/src/include/device/pci.h index 2cfcb60244..14c4693459 100644 --- a/src/include/device/pci.h +++ b/src/include/device/pci.h @@ -35,14 +35,17 @@ struct pci_operations { /* Common pci bus operations */ struct pci_bus_operations { - uint8_t (*read8)(const struct device *dev, uint16_t reg); - uint16_t (*read16)(const struct device *dev, uint16_t reg); - uint32_t (*read32)(const struct device *dev, uint16_t reg); - void (*write8)(const struct device *dev, uint16_t reg, uint8_t val); - void (*write16)(const struct device *dev, uint16_t reg, uint16_t val); - void (*write32)(const struct device *dev, uint16_t reg, uint32_t val); + uint8_t (*read8)(pci_devfn_t dev, uint16_t reg); + uint16_t (*read16)(pci_devfn_t dev, uint16_t reg); + uint32_t (*read32)(pci_devfn_t dev, uint16_t reg); + void (*write8)(pci_devfn_t dev, uint16_t reg, uint8_t val); + void (*write16)(pci_devfn_t dev, uint16_t reg, uint16_t val); + void (*write32)(pci_devfn_t dev, uint16_t reg, uint32_t val); }; +// FIXME: Needs complete pci_bus_operations +#include + struct pci_driver { const struct device_operations *ops; unsigned short vendor; diff --git a/src/include/device/pci_ops.h b/src/include/device/pci_ops.h index 82f96584de..bb77754cb6 100644 --- a/src/include/device/pci_ops.h +++ b/src/include/device/pci_ops.h @@ -48,52 +48,58 @@ static __always_inline const struct pci_bus_operations *pci_bus_ops(void) void __noreturn pcidev_die(void); -static __always_inline void pcidev_assert(const struct device *dev) +static __always_inline pci_devfn_t pcidev_bdf(const struct device *dev) +{ + return (dev->path.pci.devfn << 12) | (dev->bus->secondary << 20); +} + +static __always_inline pci_devfn_t pcidev_assert(const struct device *dev) { if (!dev) pcidev_die(); + return pcidev_bdf(dev); } static __always_inline u8 pci_read_config8(const struct device *dev, u16 reg) { - pcidev_assert(dev); - return pci_bus_ops()->read8(dev, reg); + pci_devfn_t bdf = PCI_BDF(dev); + return pci_bus_ops()->read8(bdf, reg); } static __always_inline u16 pci_read_config16(const struct device *dev, u16 reg) { - pcidev_assert(dev); - return pci_bus_ops()->read16(dev, reg); + pci_devfn_t bdf = PCI_BDF(dev); + return pci_bus_ops()->read16(bdf, reg); } static __always_inline u32 pci_read_config32(const struct device *dev, u16 reg) { - pcidev_assert(dev); - return pci_bus_ops()->read32(dev, reg); + pci_devfn_t bdf = PCI_BDF(dev); + return pci_bus_ops()->read32(bdf, reg); } static __always_inline void pci_write_config8(const struct device *dev, u16 reg, u8 val) { - pcidev_assert(dev); - pci_bus_ops()->write8(dev, reg, val); + pci_devfn_t bdf = PCI_BDF(dev); + pci_bus_ops()->write8(bdf, reg, val); } static __always_inline void pci_write_config16(const struct device *dev, u16 reg, u16 val) { - pcidev_assert(dev); - pci_bus_ops()->write16(dev, reg, val); + pci_devfn_t bdf = PCI_BDF(dev); + pci_bus_ops()->write16(bdf, reg, val); } static __always_inline void pci_write_config32(const struct device *dev, u16 reg, u32 val) { - pcidev_assert(dev); - pci_bus_ops()->write32(dev, reg, val); + pci_devfn_t bdf = PCI_BDF(dev); + pci_bus_ops()->write32(bdf, reg, val); } #endif diff --git a/src/include/device/pci_type.h b/src/include/device/pci_type.h index 3f72c5f167..27d35589cc 100644 --- a/src/include/device/pci_type.h +++ b/src/include/device/pci_type.h @@ -25,4 +25,15 @@ typedef u32 pci_devfn_t; #define PCI_DEV_INVALID (0xffffffffU) +#if 1 +/* FIXME: For most of the time in ramstage, we get valid device pointer + * from calling the driver entry points. The assert should only be used + * with searches like pcidev_behind(), and only if caller does not make + * the check themselves. + */ +#define PCI_BDF(dev) pcidev_assert((dev)) +#else +#define PCI_BDF(dev) pcidev_bdf((dev)) +#endif + #endif /* DEVICE_PCI_TYPE_H */ -- cgit v1.2.3