From 3280b7672907cd70609f90010a653fa47b4e7c85 Mon Sep 17 00:00:00 2001 From: Bora Guvendik Date: Mon, 16 Dec 2019 16:51:38 -0800 Subject: storage/mmc: Fix wrong frequency setting for HS speed mode MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Emmc spec, JEDEC Standard No. 84-B51, section 6.6.2.3, selection flow of HS400 using Enhanced Strobe states that host should change frequency to ≤ 52MHz when switching to HS speed mode first. In current code, mmc_select_hs400() calls mmc_select_hs() to do this, however caps are not cleared, so when switching from HS200 to HS400, caps will still have DRVR_CAP_HS200, and mmc_recalculate_clock() will set 200Mhz instead of ≤ 52MHz. As a result, switching to HS400 will intermittently fail. BUG=b:140124451 TEST=Switch speed from HS200 to HS400 on WHL RVP. Change-Id: Ie639c7616105cca638417d7bc1db95b561afb7af Signed-off-by: Bora Guvendik Reviewed-on: https://review.coreboot.org/c/coreboot/+/37775 Reviewed-by: Selma Bensaid Reviewed-by: Subrata Banik Tested-by: build bot (Jenkins) --- src/commonlib/storage/mmc.c | 1 + 1 file changed, 1 insertion(+) diff --git a/src/commonlib/storage/mmc.c b/src/commonlib/storage/mmc.c index 0b682adc89..1e0f7d20f0 100644 --- a/src/commonlib/storage/mmc.c +++ b/src/commonlib/storage/mmc.c @@ -186,6 +186,7 @@ static int mmc_select_hs(struct storage_media *media) /* Increase the controller clock speed */ SET_TIMING(media->ctrlr, BUS_TIMING_MMC_HS); + media->caps &= ~(DRVR_CAP_HS200 | DRVR_CAP_HS400); media->caps |= DRVR_CAP_HS52 | DRVR_CAP_HS; mmc_recalculate_clock(media); ret = sd_mmc_send_status(media, SD_MMC_IO_RETRIES); -- cgit v1.2.3