From 3228b266b2c6da6cd274c0905a960bd4300fc567 Mon Sep 17 00:00:00 2001 From: Stanley Wu Date: Thu, 15 Dec 2022 17:41:13 +0800 Subject: mb/google/nissa/var/pujjo: Tunning RegProxCtrl0 register for SX9324 Update SX9324 RegProxCtrl0 register settings based on tunning value from P-sensor vendor. BUG=b:242662878 TEST=i2cdump -y -f 13 0x28 on Pujjo Signed-off-by: Stanley Wu Change-Id: If471a6fee5a3daeac1958709415b2d5e1329b81b Reviewed-on: https://review.coreboot.org/c/coreboot/+/70824 Tested-by: build bot (Jenkins) Reviewed-by: Eric Lai Reviewed-by: Reka Norman --- src/mainboard/google/brya/variants/pujjo/overridetree.cb | 4 ++-- 1 file changed, 2 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/brya/variants/pujjo/overridetree.cb b/src/mainboard/google/brya/variants/pujjo/overridetree.cb index ade32f0ad3..3997a815c8 100644 --- a/src/mainboard/google/brya/variants/pujjo/overridetree.cb +++ b/src/mainboard/google/brya/variants/pujjo/overridetree.cb @@ -410,7 +410,7 @@ chip soc/intel/alderlake register "reg_afe_ph1" = "0x1b" register "reg_afe_ph2" = "0x1f" register "reg_afe_ph3" = "0x3d" - register "reg_prox_ctrl0" = "0x0a" + register "reg_prox_ctrl0" = "0x0b" register "reg_prox_ctrl1" = "0x0a" register "reg_prox_ctrl2" = "0x90" register "reg_prox_ctrl3" = "0x60" @@ -447,7 +447,7 @@ chip soc/intel/alderlake register "ph01_resolution" = "1024" register "ph23_resolution" = "1024" register "startup_sensor" = "1" - register "ph01_proxraw_strength" = "2" + register "ph01_proxraw_strength" = "3" register "ph23_proxraw_strength" = "2" register "avg_pos_strength" = "256" register "cs_idle_sleep" = ""hi-z"" -- cgit v1.2.3