From 301f84c6d7e93bcebe0e8c8d447308aa0044a615 Mon Sep 17 00:00:00 2001 From: Andrew Chew Date: Mon, 10 Feb 2014 16:36:53 -0800 Subject: tegra124: Add pwm_controller registers Add some defines and structs that describe what the PWM registers look like. BUG=none TEST=emerge-nyan chromeos-coreboot-nyan Original-Change-Id: Ie10589e4cbf5292e543d205ac8a1c6b09a0f76d0 Original-Signed-off-by: Andrew Chew Original-Reviewed-on: https://chromium-review.googlesource.com/185771 Original-Reviewed-by: Andrew Bresticker (cherry picked from commit fbbd2a5e148c1142aee100dbcde17c865b06b2bd) Signed-off-by: Marc Jones Change-Id: If4dc40c1dcdf1723e05923e2fea42ccc47766699 Reviewed-on: http://review.coreboot.org/7401 Tested-by: build bot (Jenkins) Reviewed-by: Edward O'Callaghan --- src/soc/nvidia/tegra/pwm.h | 43 +++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 43 insertions(+) create mode 100644 src/soc/nvidia/tegra/pwm.h diff --git a/src/soc/nvidia/tegra/pwm.h b/src/soc/nvidia/tegra/pwm.h new file mode 100644 index 0000000000..eea5b07b91 --- /dev/null +++ b/src/soc/nvidia/tegra/pwm.h @@ -0,0 +1,43 @@ +/* + * Copyright 2014 Google Inc. + * (C) Copyright 2010 + * NVIDIA Corporation + * + * See file CREDITS for list of people who contributed to this + * project. + * + * This program is free software; you can redistribute it and/or + * modify it under the terms of the GNU General Public License as + * published by the Free Software Foundation; either version 2 of + * the License, or (at your option) any later version. + * + * This program is distributed in the hope that it will be useful, + * but WITHOUT ANY WARRANTY; without even the implied warranty of + * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the + * GNU General Public License for more details. + * + * You should have received a copy of the GNU General Public License + * along with this program; if not, write to the Free Software + * Foundation, Inc., 59 Temple Place, Suite 330, Boston, + * MA 02111-1307 USA + */ + +#ifndef __SOC_NVIDIA_TEGRA_PWM_H +#define __SOC_NVIDIA_TEGRA_PWM_H + +#include + +/* Register definitions for the Tegra pwm controller */ +#define NV_PWM_CSR_ENABLE_SHIFT 31 +#define NV_PWM_CSR_PULSE_WIDTH_SHIFT 16 + +struct pwm_reg { + u32 csr; + u32 rsvd[3]; +}; + +struct pwm_controller { + struct pwm_reg pwm[4]; +}; + +#endif /* __SOC_NVIDIA_TEGRA_PWM_H */ -- cgit v1.2.3