From 2dd8f2e13b9e8bf10cd98e707534975f9ebb0ac4 Mon Sep 17 00:00:00 2001
From: Subrata Banik <subratabanik@google.com>
Date: Fri, 8 Nov 2024 01:55:12 +0530
Subject: soc/intel/{adl, mtl, ptl}: Drop CLFLUSH (X86_CLFLUSH_CAR) config
This patch drops the X86_CLFLUSH_CAR config from the latest Intel SoCs
(ADL, MTL, PTL) following the switch to WC (Write-Combining) MTRR type
for the RAMTOP range.
Previously, with WB (Write-Back) caching for RAMTOP, CLFLUSH was
crucial to ensure data consistency, as WB caches both reads and writes.
However, since the RAMTOP range now relies on WC MTRR, the role of
CLFLUSH becomes less critical.
Removing CLFLUSH in this scenario can improve performance, as it avoids
unnecessary cache invalidations.
BUG=b:373290479
TEST=Able to build and boot google/trulo.
Change-Id: I3631a58ba03cd2fbe8821bc89b1ca7226c2f0fd4
Signed-off-by: Subrata Banik <subratabanik@google.com>
Reviewed-on: https://review.coreboot.org/c/coreboot/+/85028
Reviewed-by: Dinesh Gehlot <digehlot@google.com>
Reviewed-by: V Sowmya <v.sowmya@intel.com>
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Jayvik Desai <jayvik@google.com>
Reviewed-by: Kapil Porwal <kapilporwal@google.com>
---
src/soc/intel/alderlake/Kconfig | 1 -
src/soc/intel/meteorlake/Kconfig | 1 -
src/soc/intel/pantherlake/Kconfig | 1 -
3 files changed, 3 deletions(-)
diff --git a/src/soc/intel/alderlake/Kconfig b/src/soc/intel/alderlake/Kconfig
index dddf71fe09..f6e918204b 100644
--- a/src/soc/intel/alderlake/Kconfig
+++ b/src/soc/intel/alderlake/Kconfig
@@ -96,7 +96,6 @@ config SOC_INTEL_ALDERLAKE
select UDK_202111_BINDING if SOC_INTEL_ALDERLAKE_PCH_N
select UDK_202005_BINDING if !SOC_INTEL_ALDERLAKE_PCH_N && !SOC_INTEL_RAPTORLAKE
select VBOOT_LIB
- select X86_CLFLUSH_CAR
help
Intel Alderlake support. Mainboards should specify the PCH
type using the `SOC_INTEL_ALDERLAKE_PCH_*` options instead
diff --git a/src/soc/intel/meteorlake/Kconfig b/src/soc/intel/meteorlake/Kconfig
index 4dc6082f3b..73d68df296 100644
--- a/src/soc/intel/meteorlake/Kconfig
+++ b/src/soc/intel/meteorlake/Kconfig
@@ -102,7 +102,6 @@ config SOC_INTEL_METEORLAKE
select TSC_MONOTONIC_TIMER
select UDELAY_TSC
select UDK_202302_BINDING
- select X86_CLFLUSH_CAR
select X86_INIT_NEED_1_SIPI
select INTEL_KEYLOCKER
help
diff --git a/src/soc/intel/pantherlake/Kconfig b/src/soc/intel/pantherlake/Kconfig
index 76a84cdeb8..96324b7c09 100644
--- a/src/soc/intel/pantherlake/Kconfig
+++ b/src/soc/intel/pantherlake/Kconfig
@@ -105,7 +105,6 @@ config SOC_INTEL_PANTHERLAKE_BASE
select UDELAY_TSC
select UDK_202302_BINDING
select USE_X86_64_SUPPORT
- select X86_CLFLUSH_CAR
select X86_INIT_NEED_1_SIPI
help
Intel Pantherlake support. Mainboards should specify the SoC
--
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