From 28114ae71bd94c5db17073e1e9a96173331055be Mon Sep 17 00:00:00 2001 From: Elyes HAOUAS Date: Wed, 14 Nov 2018 17:51:00 +0100 Subject: SMBIOS: Remove duplicated smbios_memory_type enum Change-Id: I49554d13f1b6371b85a58cc1263608ad9e99130e Signed-off-by: Elyes HAOUAS Reviewed-on: https://review.coreboot.org/29638 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Rudolph Reviewed-by: Richard Spiegel --- src/include/memory_info.h | 2 +- src/include/smbios.h | 36 +++++-------------------- src/mainboard/google/cyan/spd/spd.c | 4 +-- src/soc/intel/skylake/romstage/romstage_fsp20.c | 8 +++--- 4 files changed, 13 insertions(+), 37 deletions(-) diff --git a/src/include/memory_info.h b/src/include/memory_info.h index 5976e319f8..93c7b6bfc9 100644 --- a/src/include/memory_info.h +++ b/src/include/memory_info.h @@ -36,7 +36,7 @@ struct dimm_info { /* * SMBIOS (not SPD) device type. * - * See the smbios.h smbios_memory_device_type enum. + * See the smbios.h smbios_memory_type enum. */ uint16_t ddr_type; uint16_t ddr_frequency; diff --git a/src/include/smbios.h b/src/include/smbios.h index 574b92469f..14badbc964 100644 --- a/src/include/smbios.h +++ b/src/include/smbios.h @@ -96,36 +96,6 @@ typedef enum { MEMORY_BUS_WIDTH_MAX = 7, } smbios_memory_bus_width; -typedef enum { - MEMORY_DEVICE_OTHER = 0x01, - MEMORY_DEVICE_UNKNOWN = 0x02, - MEMORY_DEVICE_DRAM = 0x03, - MEMORY_DEVICE_EDRAM = 0x04, - MEMORY_DEVICE_VRAM = 0x05, - MEMORY_DEVICE_SRAM = 0x06, - MEMORY_DEVICE_RAM = 0x07, - MEMORY_DEVICE_ROM = 0x08, - MEMORY_DEVICE_FLASH = 0x09, - MEMORY_DEVICE_EEPROM = 0x0A, - MEMORY_DEVICE_FEPROM = 0x0B, - MEMORY_DEVICE_EPROM = 0x0C, - MEMORY_DEVICE_CDRAM = 0x0D, - MEMORY_DEVICE_3DRAM = 0x0E, - MEMORY_DEVICE_SDRAM = 0x0F, - MEMORY_DEVICE_SGRAM = 0x10, - MEMORY_DEVICE_RDRAM = 0x11, - MEMORY_DEVICE_DDR = 0x12, - MEMORY_DEVICE_DDR2 = 0x13, - MEMORY_DEVICE_DDR2_FB_DIMM = 0x14, - MEMORY_DEVICE_DDR3 = 0x18, - MEMORY_DEVICE_DBD2 = 0x19, - MEMORY_DEVICE_DDR4 = 0x1A, - MEMORY_DEVICE_LPDDR = 0x1B, - MEMORY_DEVICE_LPDDR2 = 0x1C, - MEMORY_DEVICE_LPDDR3 = 0x1D, - MEMORY_DEVICE_LPDDR4 = 0x1E, -} smbios_memory_device_type; - typedef enum { MEMORY_FORMFACTOR_OTHER = 0x01, MEMORY_FORMFACTOR_UNKNOWN = 0x02, @@ -167,6 +137,12 @@ typedef enum { MEMORY_TYPE_DDR2_FBDIMM = 0x14, MEMORY_TYPE_DDR3 = 0x18, MEMORY_TYPE_FBD2 = 0x19, + MEMORY_TYPE_DDR4 = 0x1a, + MEMORY_TYPE_LPDDR = 0x1b, + MEMORY_TYPE_LPDDR2 = 0x1c, + MEMORY_TYPE_LPDDR3 = 0x1d, + MEMORY_TYPE_LPDDR4 = 0x1e, + MEMORY_TYPE_LOGICAL_NON_VOLATILE_DEVICE = 0x1f, } smbios_memory_type; typedef enum { diff --git a/src/mainboard/google/cyan/spd/spd.c b/src/mainboard/google/cyan/spd/spd.c index 7682677d69..b7b0c30c5d 100644 --- a/src/mainboard/google/cyan/spd/spd.c +++ b/src/mainboard/google/cyan/spd/spd.c @@ -138,9 +138,9 @@ static void set_dimm_info(uint8_t *spd, struct dimm_info *dimm) /* Parse the SPD data to determine the DIMM information */ if (IS_ENABLED(CONFIG_BOARD_GOOGLE_CYAN)) { - dimm->ddr_type = MEMORY_DEVICE_DDR3; + dimm->ddr_type = MEMORY_TYPE_DDR3; } else { - dimm->ddr_type = MEMORY_DEVICE_LPDDR3; + dimm->ddr_type = MEMORY_TYPE_LPDDR3; } dimm->dimm_size = capmb / 8 * busw / devw * ranks; /* MiB */ dimm->mod_type = spd[3] & 0xf; diff --git a/src/soc/intel/skylake/romstage/romstage_fsp20.c b/src/soc/intel/skylake/romstage/romstage_fsp20.c index 0945780c9f..eed9d8bef0 100644 --- a/src/soc/intel/skylake/romstage/romstage_fsp20.c +++ b/src/soc/intel/skylake/romstage/romstage_fsp20.c @@ -103,16 +103,16 @@ static void save_dimm_info(void) switch(memory_info_hob->MemoryType) { case MRC_DDR_TYPE_DDR4: - ddr_type = MEMORY_DEVICE_DDR4; + ddr_type = MEMORY_TYPE_DDR4; break; case MRC_DDR_TYPE_DDR3: - ddr_type = MEMORY_DEVICE_DDR3; + ddr_type = MEMORY_TYPE_DDR3; break; case MRC_DDR_TYPE_LPDDR3: - ddr_type = MEMORY_DEVICE_LPDDR3; + ddr_type = MEMORY_TYPE_LPDDR3; break; default: - ddr_type = MEMORY_DEVICE_UNKNOWN; + ddr_type = MEMORY_TYPE_UNKNOWN; break; } -- cgit v1.2.3