From 1f9f04e57117aea8e06be4fc49f3d7fa8b096389 Mon Sep 17 00:00:00 2001 From: David Hendricks Date: Thu, 1 Aug 2013 18:57:52 -0700 Subject: pit: update PMIC write sequence in romstage This update the PMIC write sequence to be correct for newer board revisions. Signed-off-by: David Hendricks Change-Id: I2210b0d1945fb19c96a674c8fad1b0ff5a4a381e Reviewed-on: https://gerrit.chromium.org/gerrit/64304 Reviewed-by: Ronald G. Minnich Commit-Queue: David Hendricks Tested-by: David Hendricks Reviewed-on: http://review.coreboot.org/4427 Tested-by: build bot (Jenkins) Reviewed-by: Patrick Georgi --- src/mainboard/google/pit/romstage.c | 5 +++-- 1 file changed, 3 insertions(+), 2 deletions(-) diff --git a/src/mainboard/google/pit/romstage.c b/src/mainboard/google/pit/romstage.c index c11f712e65..853e24dd70 100644 --- a/src/mainboard/google/pit/romstage.c +++ b/src/mainboard/google/pit/romstage.c @@ -59,7 +59,7 @@ struct pmic_write pmic_writes[] = { 0, MAX77802_REG_PMIC_BUCK1DVS1, MAX77802_BUCK1DVS1_1V }, { 1, MAX77802_REG_PMIC_BUCK1CTRL, MAX77802_BUCK_TYPE1_ON | MAX77802_BUCK_TYPE1_IGNORE_PWRREQ }, - { 0, MAX77802_REG_PMIC_BUCK2DVS1, MAX77802_BUCK2DVS1_1V }, + { 0, MAX77802_REG_PMIC_BUCK2DVS1, MAX77802_BUCK2DVS1_1_2625V }, { 1, MAX77802_REG_PMIC_BUCK2CTRL1, MAX77802_BUCK_TYPE2_ON | MAX77802_BUCK_TYPE2_IGNORE_PWRREQ }, { 0, MAX77802_REG_PMIC_BUCK3DVS1, MAX77802_BUCK3DVS1_1V }, @@ -71,7 +71,8 @@ struct pmic_write pmic_writes[] = { 0, MAX77802_REG_PMIC_BUCK6DVS1, MAX77802_BUCK6DVS1_1V }, { 1, MAX77802_REG_PMIC_BUCK6CTRL, MAX77802_BUCK_TYPE1_ON | MAX77802_BUCK_TYPE1_IGNORE_PWRREQ }, - { 1, MAX77802_REG_PMIC_LDO35CTRL1, MAX77802_LDO35CTRL1_1_2V }, + /* Disable Boost(bypass) OUTPUT */ + { 0, MAX77802_REG_PMIC_BOOSTCTRL, MAX77802_BOOSTCTRL_OFF}, }; static void setup_power(int is_resume) -- cgit v1.2.3