From 1547ef23624fe3748ba8aa1130e48fdf6bc1207b Mon Sep 17 00:00:00 2001 From: Edward O'Callaghan Date: Sun, 23 Mar 2014 20:42:02 +1100 Subject: mainboard/jetway/nf81-t56n-lf: Turn on PME in devicetree.cb MIME-Version: 1.0 Content-Type: text/plain; charset=UTF-8 Content-Transfer-Encoding: 8bit Change-Id: Ia58994d14ebf488a9200b02ec7af9c71ef4de9e6 Signed-off-by: Edward O'Callaghan Reviewed-on: http://review.coreboot.org/5401 Tested-by: build bot (Jenkins) Reviewed-by: Kyösti Mälkki --- src/mainboard/jetway/nf81-t56n-lf/devicetree.cb | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb index 5f49b411ad..574bb8abf0 100644 --- a/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb +++ b/src/mainboard/jetway/nf81-t56n-lf/devicetree.cb @@ -93,7 +93,7 @@ chip northbridge/amd/agesa/family14/root_complex # $ sudo isadump 0x4e 0x4f 0x7 # which select logical device (LDN) 7. Then read that we have in 0x27, bit1 device pnp 2e.07 off end # BSEL - device pnp 2e.0a off end # PME + device pnp 2e.0a on end # PME end # f71869ad end #LPC device pci 14.4 on end # PCIB 0x4384, NOTE: PCI interface pins shared with GPIO {GPIO 35:0} -- cgit v1.2.3