From 141a1772cac7be67fd007377f567a8b356d5c6c1 Mon Sep 17 00:00:00 2001 From: Elyes Haouas Date: Mon, 23 Jan 2023 09:51:18 +0000 Subject: Revert "soc/intel/xeon_sp: Enable FSP_ERROR_INFO_HOB handling" This reverts commit 80b1fa33. Reason for revert: "Error: CONFIG() used on unknown value (ENABLE_FSP_ERROR_INFO) at src/soc/intel/xeon_sp/romstage.c:20" Change-Id: I843322fc9d7ebbc30e9209ae933313f2668bfa40 Signed-off-by: Elyes Haouas Reviewed-on: https://review.coreboot.org/c/coreboot/+/71287 Tested-by: build bot (Jenkins) Reviewed-by: Lean Sheng Tan Reviewed-by: Arthur Heymans --- src/soc/intel/xeon_sp/include/soc/romstage.h | 1 - src/soc/intel/xeon_sp/romstage.c | 3 --- 2 files changed, 4 deletions(-) diff --git a/src/soc/intel/xeon_sp/include/soc/romstage.h b/src/soc/intel/xeon_sp/include/soc/romstage.h index 10d334ff4d..a2adfed918 100644 --- a/src/soc/intel/xeon_sp/include/soc/romstage.h +++ b/src/soc/intel/xeon_sp/include/soc/romstage.h @@ -10,6 +10,5 @@ void mainboard_memory_init_params(FSPM_UPD * mupd); void mainboard_rtc_failed(void); void save_dimm_info(void); void mainboard_ewl_check(void); -void fsp_check_for_error(void); #endif /* _SOC_ROMSTAGE_H_ */ diff --git a/src/soc/intel/xeon_sp/romstage.c b/src/soc/intel/xeon_sp/romstage.c index 530e6eaf0b..d001d61ece 100644 --- a/src/soc/intel/xeon_sp/romstage.c +++ b/src/soc/intel/xeon_sp/romstage.c @@ -17,9 +17,6 @@ void mainboard_romstage_entry(void) printk(BIOS_DEBUG, "coreboot fsp_memory_init finished...\n"); mainboard_ewl_check(); - if (CONFIG(ENABLE_FSP_ERROR_INFO)) - fsp_check_for_error(); - unlock_pam_regions(); save_dimm_info(); -- cgit v1.2.3