From 131ff8ccec9677144cbed19dba3f4ef1851cce8f Mon Sep 17 00:00:00 2001
From: Tristan Shieh <tristan.shieh@mediatek.com>
Date: Fri, 6 Jul 2018 15:37:05 +0800
Subject: google/kukui: Add SPI NOR support
This patch sets SPI flash related configs and inits SPI bus 1 to
support SPI NOR flash.
BUG=b:80501386
BRANCH=none
TEST=Boots correctly on Kukui
Change-Id: I1a18a456f41a7c7daec954e961c9fbee3650493d
Signed-off-by: Tristan Shieh <tristan.shieh@mediatek.com>
Reviewed-on: https://review.coreboot.org/27499
Tested-by: build bot (Jenkins) <no-reply@coreboot.org>
Reviewed-by: Julius Werner <jwerner@chromium.org>
---
src/mainboard/google/kukui/Kconfig | 7 ++++++-
src/mainboard/google/kukui/Makefile.inc | 1 +
src/mainboard/google/kukui/bootblock.c | 22 ++++++++++++++++++++++
src/mainboard/google/kukui/chromeos.fmd | 2 +-
4 files changed, 30 insertions(+), 2 deletions(-)
create mode 100644 src/mainboard/google/kukui/bootblock.c
diff --git a/src/mainboard/google/kukui/Kconfig b/src/mainboard/google/kukui/Kconfig
index fa8099e6bd..6714b442fa 100644
--- a/src/mainboard/google/kukui/Kconfig
+++ b/src/mainboard/google/kukui/Kconfig
@@ -6,11 +6,12 @@ config VBOOT
config BOARD_SPECIFIC_OPTIONS
def_bool y
select SOC_MEDIATEK_MT8183
- select BOARD_ROMSIZE_KB_4096
+ select BOARD_ROMSIZE_KB_8192
select MAINBOARD_HAS_CHROMEOS
select COMMON_CBFS_SPI_WRAPPER
select SPI_FLASH
select FATAL_ASSERTS
+ select SPI_FLASH_INCLUDE_ALL_DRIVERS
config MAINBOARD_DIR
string
@@ -20,4 +21,8 @@ config MAINBOARD_PART_NUMBER
string
default "Kukui"
+config BOOT_DEVICE_SPI_FLASH_BUS
+ int
+ default 1
+
endif
diff --git a/src/mainboard/google/kukui/Makefile.inc b/src/mainboard/google/kukui/Makefile.inc
index e474212bf6..290be4cf0e 100644
--- a/src/mainboard/google/kukui/Makefile.inc
+++ b/src/mainboard/google/kukui/Makefile.inc
@@ -1,3 +1,4 @@
+bootblock-y += bootblock.c
bootblock-y += memlayout.ld
decompressor-y += memlayout.ld
diff --git a/src/mainboard/google/kukui/bootblock.c b/src/mainboard/google/kukui/bootblock.c
new file mode 100644
index 0000000000..79f20a3a58
--- /dev/null
+++ b/src/mainboard/google/kukui/bootblock.c
@@ -0,0 +1,22 @@
+/*
+ * This file is part of the coreboot project.
+ *
+ * Copyright 2018 MediaTek Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; version 2 of the License.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ */
+
+#include <bootblock_common.h>
+#include <soc/spi.h>
+
+void bootblock_mainboard_init(void)
+{
+ mtk_spi_init(CONFIG_BOOT_DEVICE_SPI_FLASH_BUS, SPI_PAD0_MASK, 26 * MHz);
+}
diff --git a/src/mainboard/google/kukui/chromeos.fmd b/src/mainboard/google/kukui/chromeos.fmd
index 9c618e3cdf..a521b0c1a3 100644
--- a/src/mainboard/google/kukui/chromeos.fmd
+++ b/src/mainboard/google/kukui/chromeos.fmd
@@ -1,4 +1,4 @@
-FLASH@0x0 0x400000 {
+FLASH@0x0 0x800000 {
WP_RO@0x0 0x200000 {
RO_SECTION@0x0 0x1f0000 {
BOOTBLOCK@0 128K
--
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